Abstract: Embodiments of the present invention provide a method that comprises receiving an image frame, determining an image frame identification (ID) for the image frame, collecting image frame statistics comprising at least one type of statistic from the image frame, and correlating the image frame statistics with the image frame ID.

Abstract: Devices, systems, methods, and other embodiments associated with block type selection are described. In one embodiment, a method calculates for each block from a set of M×N blocks that form a macroblock of image data, a first set of data. Adjacent blocks of the set of M×N blocks are combined into composite blocks. Data of the first set of data is selectively forwarded to composite blocks. For each composited block, a second set of data is calculated based, at least in part, on the forwarded data. A participation block is selected from one of the set of M×N blocks and the set of composite blocks based, at least in part, on the first set of data and the second set of data. The macroblock is compressed based on the participation block.

Abstract: Systems and methods are provided for calculating a motion vector for a macroblock between a reference frame and a current frame. The system includes a main processor. The system further includes a programmable video accelerator configured to receive a linked list of variable length descriptor inputs at the direction of the main processor. The descriptor inputs include the macroblock for which the motion vector is to be calculated. The video accelerator is further configured to calculate a motion vector identifying motion of the identified macroblock from the reference frame to the current frame.

Abstract: Embodiments of the present invention provide a method that comprises receiving an image frame, determining an image frame identification (ID) for the image frame, collecting image frame statistics comprising at least one type of statistic from the image frame, and correlating the image frame statistics with the image frame ID.

Abstract: In accordance with the teachings described herein, systems and methods are provided for identifying a block of pixel data in a reference frame. The system may include a data fetch, a shift register, and one or more processing blocks. The data fetch may receive a best fit integer block, where the best fit integer block is identified by comparing the current block of pixel data to a search area within a reference block of pixel data. The shift register may be configured to load pixel data to be used for performing a fractional pixel expansion for one quadrant corresponding to each integer pixel in a block of pixel data, the block of pixel data including the best fit integer block plus one additional row of integer pixels and one additional column of integer pixels, wherein a combination of all of the one quadrant fractional expansions provides a plurality of fractional blocks for the best fit integer block.

Abstract: In accordance with the teachings described herein, systems and methods are provided for scanning a search area of reference pixel data to identify a reference macroblock of pixels with a closest pixel fit to a current macroblock of pixels. An example system may include a local memory array (e.g., a shift register), a processing block and a scan sequencer. The local memory array may include a plurality of rows and columns, with N extra rows or columns in addition to a number of rows or columns necessary to store N reference macroblocks of pixels The processing block may be used to compare reference macroblocks of pixels with the current macroblock of pixels to identify the reference macroblock of pixels with the closest pixel fit to the current macroblock of pixels. The scan sequencer may be used to load reference pixel data into the local memory array and present reference macroblocks of pixels from the local memory array to the processing block according to a scan pattern.

Abstract: Provided are a method, system, and program for managing memory requests for logic blocks or clients of a device. In one embodiment, busses are separated by the type of data to be carried by the busses. In another aspect, data transfers are decoupled from the memory requests which initiate the data transfers. In another aspect, clients competing for busses are arbitrated and selected memory requests may be provided programmable higher priority than other memory operations of a similar type.

Abstract: A method and system for transmitting packets. Packets may be transmitted when a protocol control block is copied from a host processing system to a network protocol offload engine. Message information that contains packet payload addresses may be provided to the network protocol offload engine to generate a plurality of message contexts in the offload engine. With the message contexts, protocol processing may be performed at the offload engine while leaving the packet payload in the host memory. Thus, packet payloads may be transmitted directly from the host memory to a network communication link during transmission of the packets by the offload engine. Other embodiments are also described.

Abstract: Provided are a method, system, and program for managing memory for data transmission through a network. Virtual memory addresses of the data to be sent are provided to a sending agent. The sending agent provides to a host the virtual addresses of requested data. In response, the requested data addressed by the virtual addresses or the physical memory locations of the requested data are provided to the sending agent for sending to a destination.

Abstract: Provided are a method, system, and program for managing Input/Output (I/O) requests in a cache memory system. A request is received to data at a memory address in a first memory device, wherein data in the first memory device is cached in a second memory device. A determination is made as to whether to fetch the requested data from the first memory device to cache in the second memory device in response to determining that the requested data is not in the second memory device. The requested data in the first memory device is accessed and the second memory device is bypassed to execute the request in response to determining not to fetch the requested data from the first memory device to cache in the second memory device.