Patents by Inventor Christopher Vega
Christopher Vega has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12123912Abstract: A reconfigurable JTAG includes, in part, a core logic, a boundary scan chain cell, one or more reconfigurable blocks (RBs), and a reconfigurable block (RB) programming module. The RBs may include, in part, one or more reconfigurable boundary scan chain blocks (RBB) adapted to couple the boundary scan chain cell to the core logic and to input/output (I/O) ports of the reconfigurable JTAG. The RBs may also include, in part, one or more additional reconfigurable logic (ARL) blocks to provide enhanced logic for locking operations. The RB programmable module may communicate with a memory storing data for configuring the RBBs and ARLs. The RB programming module may configure the RBBs and ARLs based at least in part on the data stored in the memory to disable access to the I/O ports of the JTAG. The RB programming module may configure the RBBs to encrypt the I/O ports in accordance with a cipher algorithm.Type: GrantFiled: April 28, 2022Date of Patent: October 22, 2024Assignee: University of Florida Research Foundation, IncorporatedInventors: Swarup Bhunia, Christopher Vega, Reiner Dizon, Rohan Reddy Kalavakonda, Patanjali Sristi Lakshmiprasanna Sriramakumara
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Patent number: 12024201Abstract: Disclosed are various embodiments related to coordinated monitoring and responding to an emergency situation at a building structure as a supplement to a traditional emergency response. In some embodiments, a system comprises a computing device that is configured to receive sensor data from a sensor network. The sensor network includes monitoring units that monitor various locations of an infrastructure. The computing device determines an occurrence of an emergency event at a location in the infrastructure using an anomaly detector model based at least in part on the sensor data. A hybrid mobile unit is instructed by the computing device to navigate to the location of the emergency event. The hybrid mobile unit is configured to provide mobile sensor data associated with the location to confirm the emergency event.Type: GrantFiled: August 3, 2021Date of Patent: July 2, 2024Assignee: University of Florida Research Foundation, Inc.Inventors: Prabuddha Chakraborty, Reiner Dizon, Christopher Vega, Joel B. Harley, Sandip Ray, Swarup Bhunia, Patanjali Sristi Lakshmiprasanna Sriramakumara
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Patent number: 11978023Abstract: The present disclosure describes various embodiments of systems, apparatuses, and methods for drone-based administration of remotely located devices. One such method comprises deploying an unmanned aerial vehicle from a base station, wherein the base station assigns a maintenance order to the unmanned aerial vehicle for servicing of a remote device, traveling, by the unmanned aerial vehicle, to the location of the remote device, authenticating, by the unmanned aerial vehicle, a valid identification of the remote device; upon the remote device being authenticated by the unmanned aerial vehicle, servicing the remote device by at least charging a power supply of the remote device and transferring contents of a device log to the unmanned aerial vehicle; and after completing the servicing of the remote device; returning to the base station and transferring contents of the device log to the base station.Type: GrantFiled: September 7, 2021Date of Patent: May 7, 2024Assignee: University of Florida Research Foundation, Inc.Inventors: Swarup Bhunia, Prabuddha Chakraborty, Reiner Dizon, Parker Difuntorum, Christopher Vega, Patanjali Sristi Lakshmiprasanna Sriramakumara
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Patent number: 11856096Abstract: An integrated circuit includes, in part, a key management unit configured to generate a seeding key during a start-up phase, an encryption module configured to encrypt data using the seeding key and deliver the encrypted data to a second integrated circuit, and an encoder configured to encode the seeding key and deliver the encoded seeding key to the second IC. The second integrated circuit includes, in part, a decoder configured to decode the seeding key. Each of the integrated circuits further includes, in part, a linear-feedback shift register that receives the same clock signals and loads the seeding key.Type: GrantFiled: June 3, 2021Date of Patent: December 26, 2023Assignee: University of Florida Research Foundation, IncorporatedInventors: Swarup Bhunia, Christopher Vega, Shubhra Deb Paul, Parker Difuntorum, Reiner Dizon, Patanjali Sristi Lakshmiprasanna Sriramakumara
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Patent number: 11671100Abstract: Methods and systems are directed to creating a physical unclonable function (PUF) on a Field Programmable Gate Array (FPGA) and generating a unique signature for a device. The method includes, in part, designing a PUF by taking advantages of programmable logic elements on the FPGA, and extracting uninitialized values associated with one or more storage elements comprised in the PUF when the FPGA is powered up. The extracted uninitialized values can be combined to generate the unique signature for the device. The one or more storage elements can be bi-stable memory cells that are mapped to look up tables (LUTs) on the FPGA. The coordinates of these LUTs can be determined based on hamming distance analysis. Alternatively, the one or more storage elements can be memory cells associated with boundary scan cells of a boundary scan chain.Type: GrantFiled: September 3, 2021Date of Patent: June 6, 2023Assignee: University of Florida Research Foundation, IncorporatedInventors: Swarup Bhunia, Christopher Vega, Shubhra Deb Paul
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Publication number: 20220357394Abstract: A reconfigurable JTAG includes, in part, a core logic, a boundary scan chain cell, one or more reconfigurable blocks (RBs), and a reconfigurable block (RB) programming module. The RBs may include, in part, one or more reconfigurable boundary scan chain blocks (RBB) adapted to couple the boundary scan chain cell to the core logic and to input/output (I/O) ports of the reconfigurable JTAG. The RBs may also include, in part, one or more additional reconfigurable logic (ARL) blocks to provide enhanced logic for locking operations. The RB programmable module may communicate with a memory storing data for configuring the RBBs and ARLs. The RB programming module may configure the RBBs and ARLs based at least in part on the data stored in the memory to disable access to the I/O ports of the JTAG. The RB programming module may configure the RBBs to encrypt the I/O ports in accordance with a cipher algorithm.Type: ApplicationFiled: April 28, 2022Publication date: November 10, 2022Inventors: Swarup Bhunia, Christopher Vega, Reiner Dizon, Rohan Reddy Kalavakonda, Patanjali Sristi Lakshmiprasanna Sriramakumara
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Publication number: 20220083987Abstract: The present disclosure describes various embodiments of systems, apparatuses, and methods for drone-based administration of remotely located devices. One such method comprises deploying an unmanned aerial vehicle from a base station, wherein the base station assigns a maintenance order to the unmanned aerial vehicle for servicing of a remote device, traveling, by the unmanned aerial vehicle, to the location of the remote device, authenticating, by the unmanned aerial vehicle, a valid identification of the remote device; upon the remote device being authenticated by the unmanned aerial vehicle, servicing the remote device by at least charging a power supply of the remote device and transferring contents of a device log to the unmanned aerial vehicle; and after completing the servicing of the remote device; returning to the base station and transferring contents of the device log to the base station.Type: ApplicationFiled: September 7, 2021Publication date: March 17, 2022Inventors: SWARUP BHUNIA, PRABUDDHA CHAKRABORTY, REINER DIZON, PARKER DIFUNTORUM, CHRISTOPHER VEGA, PATANJALI SRISTI LAKSHMIPRASANNA SRIRAMAKUMARA
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Publication number: 20220077858Abstract: Methods and systems are directed to creating a physical unclonable function (PUF) on a Field Programmable Gate Array (FPGA) and generating a unique signature for a device. The method includes, in part, designing a PUF by taking advantages of programmable logic elements on the FPGA, and extracting uninitialized values associated with one or more storage elements comprised in the PUF when the FPGA is powered up. The extracted uninitialized values can be combined to generate the unique signature for the device. The one or more storage elements can be bi-stable memory cells that are mapped to look up tables (LUTs) on the FPGA. The coordinates of these LUTs can be determined based on hamming distance analysis. Alternatively, the one or more storage elements can be memory cells associated with boundary scan cells of a boundary scan chain.Type: ApplicationFiled: September 3, 2021Publication date: March 10, 2022Inventors: Swarup Bhunia, Christopher Vega, Shubhra Deb Paul
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Publication number: 20220041187Abstract: Disclosed are various embodiments related to coordinated monitoring and responding to an emergency situation at a building structure as a supplement to a traditional emergency response. In some embodiments, a system comprises a computing device that is configured to receive sensor data from a sensor network. The sensor network includes monitoring units that monitor various locations of an infrastructure. The computing device determines an occurrence of an emergency event at a location in the infrastructure using an anomaly detector model based at least in part on the sensor data. A hybrid mobile unit is instructed by the computing device to navigate to the location of the emergency event. The hybrid mobile unit is configured to provide mobile sensor data associated with the location to confirm the emergency event.Type: ApplicationFiled: August 3, 2021Publication date: February 10, 2022Inventors: Prabuddha CHAKRABORTY, Reiner DIZON, Christopher VEGA, Joel B. HARLEY, Sandip RAY, Swarup BHUNIA, Patanjali Sristi Lakshmiprasanna Sriramakumara
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Publication number: 20210391985Abstract: An integrated circuit includes, in part, a key management unit configured to generate a seeding key during a start-up phase, an encryption module configured to encrypt data using the seeding key and deliver the encrypted data to a second integrated circuit, and an encoder configured to encode the seeding key and deliver the encoded seeding key to the second IC. The second integrated circuit includes, in part, a decoder configured to decode the seeding key. Each of the integrated circuits further includes, in part, a linear-feedback shift register that receives the same clock signals and loads the seeding key.Type: ApplicationFiled: June 3, 2021Publication date: December 16, 2021Inventors: Swarup Bhunia, Christopher Vega, Shubhra Deb Paul, Parker Difuntorum, Reiner Dizon, Patanjali Sristi Lakshmiprasanna Sriramakumara