Abstract: A system for testing or debugging a device under test having an embedded logic analyzer. In one embodiment, the system includes software stored in non-transitory memory for testing a device under test having an embedded logic analyzer, the software program product having instructions which, when executed by a computing device associated with the device under test cause the computing device to reconstruct signals of interest in the device under test based at least in part upon signals captured by the embedded logic analyzer during the test or debug session, and cause the computing device to display the reconstructed signals of interest to a user of the computing device.

Abstract: A system for testing or debugging a system including the integrated circuit having an embedded logic analyzer. In one embodiment, the system includes a computing device coupled to the logic analyzer for receiving the at least one output. A user interface run on the computing device assigns an attribute to at least one signal associated with the logic analyzer, determines a new signal or value not provided by the logic analyzer, the new signal or value being based upon the at least one signal as received from the logic analyzer and upon a predetermined definition, and presents the new signal or value to a system user.

Abstract: A system for testing or debugging a device under test having an embedded logic analyzer. In one embodiment, the system includes software stored in non-transitory memory for testing a device under test having an embedded logic analyzer, the software program product having instructions which, when executed by a computing device associated with the device under test cause the computing device to reconstruct signals of interest in the device under test based at least in part upon signals captured by the embedded logic analyzer during the test or debug session, and cause the computing device to display the reconstructed signals of interest to a user of the computing device.

Abstract: A system for testing or debugging a system including the integrated circuit having an embedded logic analyzer. In one embodiment, the system includes a computing device coupled to the logic analyzer for receiving the at least one output. A user interface run on the computing device assigns an attribute to at least one signal associated with the logic analyzer, determines a new signal or value not provided by the logic analyzer, the new signal or value being based upon the at least one signal as received from the logic analyzer and upon a predetermined definition, and presents the new signal or value to a system user.

Abstract: A method of scaling and rotating an image includes generating a scaled and rotated pixel grid from a transformation operation applied to an input pixel grid. The input pixel grid comprises a plurality of pixels representing an original image, and the transformation may implement the simultaneous scaling and rotation of the input pixel grid. The respective values of a plurality of output pixels in the scaled and rotated pixel grid are then determined by interpolation.