Abstract: A computer-implemented method executed by a processor for reducing exposure of a plurality of objects to environmental conditions by employing a smart room tracking system is presented. The computer-implemented method includes counting a number of individuals within a space including the plurality of objects via one or more image capture devices and determining whether each individual makes direct eye contact with any of the plurality of objects by evaluating orientation, posture, and eye movement of each individual. The computer-implemented method further includes shielding, via an object viewing controller, an object of the plurality of objects from view when no direct eye contact is determined and making an object of the plurality of objects viewable, via the object viewing controller, when direct eye contact is determined.

Abstract: A vertical transport field-effect transistor includes a top source/drain region separated from an underlying gate stack by a multi-layer top spacer that includes an oxygen barrier layer beneath a top dielectric layer. Techniques for fabricating the transistor include depositing the oxygen barrier layer over the gate stack prior to depositing the top dielectric layer. The oxygen barrier layer blocks oxygen diffusion during deposition of the top dielectric layer, thereby avoiding damage to underlying interfacial and gate dielectric layers.

Abstract: A vertical transport field-effect transistor includes a top source/drain region separated from an underlying gate stack by a multi-layer top spacer that includes an oxygen barrier layer beneath a top dielectric layer. Techniques for fabricating the transistor include depositing the oxygen barrier layer over the gate stack prior to depositing the top dielectric layer. The oxygen barrier layer blocks oxygen diffusion during deposition of the top dielectric layer, thereby avoiding damage to underlying interfacial and gate dielectric layers.

Abstract: A backend-of-the-line (BEOL) semiconductor capacitor made by method, apparatus, or computer program product, through an airgap metallization process, patterning a first electrode by removing a portion of inter-layer dielectric for a desired capacitor area, depositing a dielectric for a capacitor insulator, filling the desired capacitor area to form a second electrode, polishing and capping the second electrode, and interconnecting the first electrode and the second electrode.

Abstract: A vertical transport field-effect transistor includes a top source/drain region separated from an underlying gate stack by a multi-layer top spacer that includes an oxygen barrier layer beneath a top dielectric layer. Techniques for fabricating the transistor include depositing the oxygen barrier layer over the gate stack prior to depositing the top dielectric layer. The oxygen barrier layer blocks oxygen diffusion during deposition of the top dielectric layer, thereby avoiding damage to underlying interfacial and gate dielectric layers.

Abstract: A vertical transport field-effect transistor includes a top source/drain region separated from an underlying gate stack by a top spacer including open gaps to reduce capacitance therebetween. Techniques for fabricating the transistor include using a sacrificial spacer that is selectively removed prior to growth of the top source/drain region. The top source/drain region may be confined by opposing dielectric layers.

Abstract: A computer-implemented method executed by a processor for reducing exposure of a plurality of objects to environmental conditions by employing a smart room tracking system is presented. The computer-implemented method includes counting a number of individuals within a space including the plurality of objects via one or more image capture devices and determining whether each individual makes direct eye contact with any of the plurality of objects by evaluating orientation, posture, and eye movement of each individual. The computer-implemented method further includes shielding, via an object viewing controller, an object of the plurality of objects from view when no direct eye contact is determined and making an object of the plurality of objects viewable, via the object viewing controller, when direct eye contact is determined.

Abstract: A computer-implemented method executed by a processor for reducing exposure of a plurality of objects to environmental conditions by employing a smart room tracking system is presented. The computer-implemented method includes counting a number of individuals within a space including the plurality of objects via one or more image capture devices and determining whether each individual makes direct eye contact with any of the plurality of objects by evaluating orientation, posture, and eye movement of each individual. The computer-implemented method further includes shielding, via an object viewing controller, an object of the plurality of objects from view when no direct eye contact is determined and making an object of the plurality of objects viewable, via the object viewing controller, when direct eye contact is determined.

Abstract: A backend-of-the-line (BEOL) semiconductor capacitor made by method, apparatus, or computer program product, through an airgap metallization process, patterning a first electrode by removing a portion of inter-layer dielectric for a desired capacitor area, depositing a dielectric for a capacitor insulator, filling the desired capacitor area to form a second electrode, polishing and capping the second electrode, and interconnecting the first electrode and the second electrode.

Abstract: A vertical transport field-effect transistor includes a top source/drain region separated from an underlying gate stack by a top spacer including open gaps to reduce capacitance therebetween. Techniques for fabricating the transistor include using a sacrificial spacer that is selectively removed prior to growth of the top source/drain region. The top source/drain region may be confined by opposing dielectric layers.

Abstract: A computer-implemented method executed by a processor for reducing exposure of a plurality of objects to environmental conditions by employing a smart room tracking system is presented. The computer-implemented method includes counting a number of individuals within a space including the plurality of objects via one or more image capture devices and determining whether each individual makes direct eye contact with any of the plurality of objects by evaluating orientation, posture, and eye movement of each individual. The computer-implemented method further includes shielding, via an object viewing controller, an object of the plurality of objects from view when no direct eye contact is determined and making an object of the plurality of objects viewable, via the object viewing controller, when direct eye contact is determined.

Abstract: A vertical transport field-effect transistor includes a top source/drain region separated from an underlying gate stack by a top spacer including open gaps to reduce capacitance therebetween. Techniques for fabricating the transistor include using a sacrificial spacer that is selectively removed prior to growth of the top source/drain region. The top source/drain region may be confined by opposing dielectric layers.

Abstract: An infant gastrointestinal monitor and a method for infant gastrointestinal monitoring are provided. The infant gastrointestinal monitor includes a belly band for placing around at least a midsection area of a subject infant. The infant gastrointestinal monitor further includes a plurality of wireless sound sensors, integrated with the belly band in an array configuration, for identifying a location of a gastrointestinal noise in the subject infant based on cross-referencing signals from the plurality of wireless sound sensors. He infant gastrointestinal monitor also includes a controller, operatively coupled to the plurality of wireless sound sensors, for analyzing the location and one or more other parameters of the gastrointestinal noise to identify a probable cause of the noise and a recommended action for a caregiver to alleviate an underlying condition causing the noise.

Abstract: A vertical transport field-effect transistor includes a top source/drain region separated from an underlying gate stack by a multi-layer top spacer that includes an oxygen barrier layer beneath a top dielectric layer. Techniques for fabricating the transistor include depositing the oxygen barrier layer over the gate stack prior to depositing the top dielectric layer. The oxygen barrier layer blocks oxygen diffusion during deposition of the top dielectric layer, thereby avoiding damage to underlying interfacial and gate dielectric layers.

Abstract: A vertical transport field-effect transistor includes a top source/drain region separated from an underlying gate stack by a top spacer including open gaps to reduce capacitance therebetween. Techniques for fabricating the transistor include using a sacrificial spacer that is selectively removed prior to growth of the top source/drain region. The top source/drain region may be confined by opposing dielectric layers.

Abstract: A vertical transport field-effect transistor includes a top source/drain region separated from an underlying gate stack by a multi-layer top spacer that includes an oxygen barrier layer beneath a top dielectric layer. Techniques for fabricating the transistor include depositing the oxygen barrier layer over the gate stack prior to depositing the top dielectric layer. The oxygen barrier layer blocks oxygen diffusion during deposition of the top dielectric layer, thereby avoiding damage to underlying interfacial and gate dielectric layers.

Abstract: A backend-of-the-line (BEOL) semiconductor capacitor made by method, apparatus, or computer program product, through an airgap metallization process, patterning a first electrode by removing a portion of inter-layer dielectric for a desired capacitor area, depositing a dielectric for a capacitor insulator, filling the desired capacitor area to form a second electrode, polishing and capping the second electrode, and interconnecting the first electrode and the second electrode.

Abstract: A backend-of-the-line (BEOL) semiconductor capacitor made by method, apparatus, or computer program product, through an airgap metallization process, patterning a first electrode by removing a portion of inter-layer dielectric for a desired capacitor area, depositing a dielectric for a capacitor insulator, filling the desired capacitor area to form a second electrode, polishing and capping the second electrode, and interconnecting the first electrode and the second electrode.