Abstract: A sensor device includes a first detector circuit, a near field communication (NFC) circuit, and a sensor package. The first detector circuit configured to detect a stimulus using a resistive change polymer type detector, a capacitive shift polymer type detector, a dielectric change polymer type detector, a graphene based sensor, or a metal-oxide (MOX) type detector. The NFC circuit having an NFC powered receiver and an NFC data transceiver. The NFC power receiver configured to receive power from a mobile device using an NFC standard protocol and to provide operating power for the sensor device. The NFC data transceiver configured to transmit data to the mobile device using the NFC standard protocol, the data corresponding to the first stimulus. The sensor package configured to house the first detector circuit and the NFC circuit.

Abstract: A sensor device includes a first detector circuit, a near field communication (NFC) circuit, and a sensor package. The first detector circuit configured to detect a stimulus using a resistive change polymer type detector, a capacitive shift polymer type detector, a dielectric change polymer type detector, a graphene based sensor, or a metal-oxide (MOX) type detector. The NFC circuit having an NFC powered receiver and an NFC data transceiver. The NFC power receiver configured to receive power from a mobile device using an NFC standard protocol and to provide operating power for the sensor device. The NFC data transceiver configured to transmit data to the mobile device using the NFC standard protocol, the data corresponding to the first stimulus. The sensor package configured to house the first detector circuit and the NFC circuit.

Abstract: A wireless communication system hosts a plurality of processes in accordance with a communication protocol. The system includes application specific instruction set processors (ASISPs) that provided computation support for the process. Each ASISP is capable of executing a subset of the functions of a communication protocol. A scheduler is used to schedule the ASISPs in a time-sliced algorithm so that each ASISP supports several processes. In this architecture, the ASISP actively performs computations for one of the supported processes (active process) at any given time. The state information of each process supported by a particular ASISP is stored in a memory bank that is uniquely associated with the ASISP. When a scheduler instructs an ASISP to change which process is the active process, the state information for the inactivated process is stored in the memory bank and the state information for the newly activated process is retrieved from the memory bank.

Abstract: The present invention provides a virtual machine interface (VMI) and an application programming interface (API) usable in conjunction with a reconfigurable wireless network communication apparatus. The reconfigurable wireless network communication apparatus comprises a plurality of hardware kernels. The apparatus can be reconfigured to support different or modified communication protocols over time. The VMI comprises a library of software objects. By configuring VMI software objects, a programmer selects the communication protocol used by the reconfigurable wireless network communication apparatus. The API of the present invention provides higher level management of the communication protocol used by a reconfigurable wireless network communication apparatus. The API comprises a library of high level software objects that further abstract hardware details of the apparatus.

Abstract: An apparatus for digitally processing signals within wireless communications base-stations which includes a channel pooling signal processor and a digital signal processor. The channel pooling signal processor includes a plurality of computation units typically realized in a heterogeneous multiprocessing architecture, a test interface for testing the function of the plurality of the computation units, a general-purpose microprocessor for managing the dataflow into and out of the channel pooling signal processor as well as effecting the control and configuration of the computation units, and an interconnect mechanism for connecting the plurality of computation units to the input, output, test interface, and the general-purpose microprocessor.

Abstract: A method of generating a configuration for a configurable spread spectrum communication device is disclosed herein. The method, implemented on a computing device having a processor and a computer readable memory, starts with a first step of receiving an input identifying a desired function, and a desired operation within the desired function, to be implemented by a configurable communication device. In a subsequent step, a signal flow path for the desired operation is generated by the computing device. Next, the desired operation is mapped onto a computing element within the configurable communication device; the computing element having localized control and being function-specific. The aforementioned steps are repeated to satisfy multiple operations required to enable the desired function.

Abstract: A method of generating a configuration for a configurable spread spectrum communication device is disclosed herein. The method, implemented on a computing device having a processor and a computer readable memory, starts with a first step of receiving an input identifying a desired function, and a desired operation within the desired function, to be implemented by a configurable communication device. In a subsequent step, a signal flow path for the desired operation is generated by the computing device. Next, the desired operation is mapped onto a computing element within the configurable communication device; the computing element having localized control and being function-specific. The aforementioned steps are repeated to satisfy multiple operations required to enable the desired function.