Patents by Inventor Christos Dimitrios Dimitrakopoulos
Christos Dimitrios Dimitrakopoulos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9151550Abstract: The invention relates to a semiconductive device comprising a die with at least one defined hot-spot area lying in a plane on the die and a cooling structure comprising nanotubes such as carbon nanotubes extending in a plane different than the plane of the hot-spot area and outwardly from the plane of the hot-spot area. The nanotubes are operatively associated with the hot-spot area to decrease any temperature gradient between the hot-spot area and at least one other area on the die defined by a temperature lower than the hot-spot area. A matrix material comprising a second heat conducting material substantially surrounds the nanotubes and is operatively associated with and in heat conducting relation with the other area on the die defined by a temperature lower than the hot-spot area.Type: GrantFiled: September 1, 2010Date of Patent: October 6, 2015Assignee: International Business Machines CorporationInventors: Christos Dimitrios Dimitrakopoulos, Christos John Georgiou
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Patent number: 8063483Abstract: An electronic device comprises a die with at least one defined hot-spot area; and at least one defined intermediate temperature area at a temperature lower than the temperature of the hot-spot area. The device also comprises a cooling structure comprising at least one bundle of first nanotubes for cooling the hot spot area and at least one bundle of additional nanotubes for cooling the intermediate temperature area, and having heat conductivity lower than the bundle of first nanotubes. The heat conductivity of both sets of the nanotubes is sufficient to decrease any temperature gradient between the defined hot spot area, the defined intermediate temperature area, and at least one lower temperature area on the die. The walls of the first nanotubes and the additional nanotubes are surrounded by a heat conducting matrix material operatively associated with the lower temperature area.Type: GrantFiled: October 18, 2007Date of Patent: November 22, 2011Assignee: International Business Machines CorporationInventors: Christo Dimitrios Dimitrakopoulos, Christos John Georgiou, Alfred Grill, Bernice E. Rogowitz
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Publication number: 20100328899Abstract: The invention relates to a semiconductive device comprising a die with at least one defined hot-spot area lying in a plane on the die and a cooling structure comprising nanotubes such as carbon nanotubes extending in a plane different than the plane of the hot-spot area and outwardly from the plane of the hot-spot area. The nanotubes are operatively associated with the hot-spot area to decrease any temperature gradient between the hot-spot area and at least one other area on the die defined by a temperature lower than the hot-spot area. A matrix material comprising a second heat conducting material substantially surrounds the nanotubes and is operatively associated with and in heat conducting relation with the other area on the die defined by a temperature lower than the hot-spot area.Type: ApplicationFiled: September 1, 2010Publication date: December 30, 2010Applicant: International Business Machines CorporationInventors: CHRISTOS DIMITRIOS DIMITRAKOPOULOS, Christos John Georgiou
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Patent number: 7842554Abstract: The invention relates to a semiconductive device comprising a die with at least one defined hot-spot area lying in a plane on the die and a cooling structure comprising nanotubes such as carbon nanotubes extending in a plane different than the plane of the hot-spot area and outwardly from the plane of the hot-spot area. The nanotubes are operatively associated with the hot-spot area to decrease any temperature gradient between the hot-spot area and at least one other area on the die defined by a temperature lower than the hot-spot area. A matrix material comprising a second heat conducting material substantially surrounds the nanotubes and is operatively associated with and in heat conducting relation with the other area on the die defined by a temperature lower than the hot-spot area.Type: GrantFiled: July 8, 2008Date of Patent: November 30, 2010Assignee: International Business Machines CorporationInventors: Christos Dimitrios Dimitrakopoulos, Christos John Georgiou
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Publication number: 20090304951Abstract: A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.Type: ApplicationFiled: August 17, 2009Publication date: December 10, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Christos Dimitrios Dimitrakopoulos, Stephen McConnell Gates, Alfred Grill, Michael Wayne Lane, Eric Gerhard Liniger, Xiao Hu Liu, Son Van Nguyen, Deborah Ann Neumayer, Thomas McCarroll Shaw
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Publication number: 20090102046Abstract: An electronic device comprises a die with at least one defined hot-spot area; and at least one defined intermediate temperature area at a temperature lower than the temperature of the hot-spot area. The device also comprises a cooling structure comprising at least one bundle of first nanotubes for cooling the hot spot area and at least one bundle of additional nanotubes for cooling the intermediate temperature area, and having heat conductivity lower than the bundle of first nanotubes. The heat conductivity of both sets of the nanotubes is sufficient to decrease any temperature gradient between the defined hot spot area, the defined intermediate temperature area, and at least one lower temperature area on the die. The walls of the first nanotubes and the additional nanotubes are surrounded by a heat conducting matrix material operatively associated with the lower temperature area.Type: ApplicationFiled: October 18, 2007Publication date: April 23, 2009Inventors: Christos Dimitrios Dimitrakopoulos, Christos John Georgiou, Alfred Grill, Bernice E. Rogowitz
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Publication number: 20080316711Abstract: The invention relates to a semiconductive device comprising a die with at least one defined hot-spot area lying in a plane on the die and a cooling structure comprising nanotubes such as carbon nanotubes extending in a plane different than the plane of the hot-spot area and outwardly from the plane of the hot-spot area. The nanotubes are operatively associated with the hot-spot area to decrease any temperature gradient between the hot-spot area and at least one other area on the die defined by a temperature lower than the hot-spot area. A matrix material comprising a second heat conducting material substantially surrounds the nanotubes and is operatively associated with and in heat conducting relation with the other area on the die defined by a temperature lower than the hot-spot area.Type: ApplicationFiled: July 8, 2008Publication date: December 25, 2008Applicant: International Business Machines CorporationInventors: Christos Dimitrios Dimitrakopoulos, Christos John Georgiou
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Publication number: 20080286494Abstract: A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.Type: ApplicationFiled: March 7, 2008Publication date: November 20, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Christos Dimitrios Dimitrakopoulos, Stephen McConnell Gates, Alfred Grill, Michael Wayne Lane, Eric Gerhard Liniger, Xiao Hu Liu, Son Van Nguyen, Deborah Ann Neumayer, Thomas McCarroll Shaw
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Patent number: 7357977Abstract: A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.Type: GrantFiled: January 13, 2005Date of Patent: April 15, 2008Assignee: International Business Machines CorporationInventors: Christos Dimitrios Dimitrakopoulos, Stephen McConnell Gates, Alfred Grill, Michael Wayne Lane, Eric Gerhard Liniger, Xiao Hu Liu, Son Van Nguyen, Deborah Ann Neumayer, Thomas McCarroll Shaw
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Patent number: 7095474Abstract: Electronic devices having patterned electrically conductive polymers providing electrical connection thereto and methods of fabrication thereof are described. Liquid crystal display cells are described having at least one of the electrodes providing a bias across the liquid crystal material formed from a patterned electrically conductive polymer. Thin film transistors having patterned electrically conductive polymers as source drain and gate electrodes are described. Light emitting diodes having anode and coated regions formed from patterned electrically conductive polymers are described. Methods of patterning using a resist mask; patterning using a patterned metal layer; patterning the metal layer using a resist; and patterning the electrically conductive polymer directly to form electrodes and anode and cathode regions are described.Type: GrantFiled: October 19, 2001Date of Patent: August 22, 2006Assignee: International Business Machines CorporationInventors: Marie Angelopoulos, Christos Dimitrios Dimitrakopoulos, Bruce Kenneth Furman, Teresita Ordonez Graham, Shui-Chih Alan Lien
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Patent number: 7026643Abstract: The invention provides a device comprising an improved n-channel semiconducting film. This film consists of a perylene tetracaboxylic acid diimide compound and was deposited onto substrates by vacuum sublimation. Thin film transistor devices comprising such films as the semiconducting channel exhibit a field effect electron mobility greater than 0.01 cm2/Vs and an on/off ratio of 10000 and higher.Type: GrantFiled: December 11, 2001Date of Patent: April 11, 2006Assignee: International Business Machines CorporationInventors: Christos Dimitrios Dimitrakopoulos, Jeffrey Donald Gelorme, Teresita Ordonez Graham, Laura Louise Kosbar, Patrick Roland Lucien Malenfant
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Publication number: 20040017347Abstract: An electrically selectable diffraction grating made of electrodes that can fabricate color pixels of light from a full spectrum of light or a white light with the particular color being based on the spacing sequence of the energized electrodes. In an unaltered state the electrodes are transparent to light, once energized the electrodes become opaque to light. A full spectrum of light can be diffracted into individual wavelengths of colored light when passed through the transparent spaces provided by the unenergized electrodes.Type: ApplicationFiled: July 29, 2002Publication date: January 29, 2004Inventors: Gareth G. Hougham, Christos Dimitrios Dimitrakopoulos, Shui-Chih Alan Lien
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Patent number: 6569707Abstract: A method for improving the performance of an organic thin film field effect transistor including the steps of: (a) forming a transistor structure having patterned source and drain electrodes; and (b) treating the patterned source and drain electrodes with a thiol compound having the formula, RSH, wherein R is a linear or branched, substituted or unsubstituted, alkyl, alkenyl, cycloalkyl or aromatic containing from about 6 to about 25 carbon atoms under conditions that are effective in forming a self-assembled monolayer of said thiol compound on said electrodes. Organic thin film transistor structures containing the self-assembled monolayer of the present invention are also disclosed.Type: GrantFiled: October 29, 2001Date of Patent: May 27, 2003Assignee: International Business Machines CorporationInventors: Christos Dimitrios Dimitrakopoulos, Ioannis Kymissis, Sampath Purushothaman
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Patent number: 6500604Abstract: A method for patterning a chemically sensitive organic thin film such as pentacene comprising (a) forming a protective material layer on the surface of a chemically sensitive organic thin film, said protective material layer being chemically resistant; (b) forming a photoresist on an exposed surface of said protective material layer; (c) patterning the photoresist; and (d) transferring the pattern to the protective material layer and the chemically sensitive organic thin film by dry etching.Type: GrantFiled: January 3, 2000Date of Patent: December 31, 2002Assignee: International Business Machines CorporationInventors: Christos Dimitrios Dimitrakopoulos, Ioannis Kymissis, Sampath Purushothaman
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Publication number: 20020164835Abstract: The invention provides a device comprising an improved n-channel semiconducting film. This film consists of a perylene tetracaboxylic acid diimide compound and was deposited onto substrates by vacuum sublimation. Thin film transistor devices comprising such films as the semiconducting channel exhibit a field effect electron mobility greater than 0.01 cm2/Vs and an on/off ratio of 10000 and higher.Type: ApplicationFiled: December 11, 2001Publication date: November 7, 2002Inventors: Christos Dimitrios Dimitrakopoulos, Jeffrey Donald Gelorme, Teresita Ordonez Graham, Laura Louise Kosbar, Partick Roland Lucien Malenfant
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Patent number: 6437422Abstract: Active devices that have either a thread or a ribbon geometry. The thread geometry includes single thread active devices and multiple thread devices. Single thread devices have a central core that may contain different materials depending upon whether the active device is responsive to electrical, light, mechanical, heat, or chemical energy. Single thread active devices include FETs, electro-optical devices, stress transducers, and the like. The active devices include a semiconductor body that for the single thread devices is a layer about the core of the thread. For the multiple thread devices, the semiconductor body is either a layer on one or more of the threads or an elongated body disposed between two of the threads. For example, a FET is formed of three threads, one of which carries a gate insulator layer and a semiconductor layer and the other two of which are electrically conductive and serve as the source and drain. The substrates or threads are preferably flexible and can be formed in a fabric.Type: GrantFiled: May 9, 2001Date of Patent: August 20, 2002Assignee: International Business Machines CorporationInventors: Paul M. Solomon, Jane Margaret Shaw, Cherie R. Kagan, Christos Dimitrios Dimitrakopoulos, Tak Hung Ning
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Publication number: 20020045289Abstract: A method for improving the performance of an organic thin film field effect transistor comprising the steps of: (a) forming a transistor structure having patterned source and drain electrodes; and (b) treating the patterned source and drain electrodes with a thiol compound having the formula, RSH, wherein R is a linear or branched, substituted or unsubstituted, alkyl, alkenyl, cycloalkyl or aromatic containing from about 6 to about 25 carbon atoms under conditions that are effective in forming a self-assembled monolayer of said thiol compound on said electrodes. Organic thin film transistor structures containing the self-assembled monolayer of the present invention are also disclosed.Type: ApplicationFiled: October 29, 2001Publication date: April 18, 2002Applicant: International Business Machines CorporationInventors: Christos Dimitrios Dimitrakopoulos, Ioannis Kymissis, Sampath Purushothaman
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Publication number: 20020025391Abstract: Electronic devices having patterned electrically conductive polymers providing electrical connection thereto and methods of fabrication thereof are described. Liquid crystal display cells are described having at least one of the electrodes providing a bias across the liquid crystal material formed from a patterned electrically conductive polymer. Thin film transistors having patterned electrically conductive polymers as source drain and gate electrodes are described. Light emitting diodes having anode and coated regions formed from patterned electrically conductive polymers are described. Methods of patterning using a resist mask; patterning using a patterned metal layer; patterning the metal layer using a resist; and patterning the electrically conductive polymer directly to form electrodes and anode and cathode regions are described.Type: ApplicationFiled: October 19, 2001Publication date: February 28, 2002Inventors: Marie Angelopoulos, Christos Dimitrios Dimitrakopoulos, Bruce Kenneth Furman, Teresita Ordonez Graham, Shui-Chih Alan Lien
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Patent number: 6344662Abstract: A thin film transistor (TFT) device structure based on an organic-inorganic hybrid semiconductor material, that exhibits a high field effect mobility, high current modulation at lower operating voltages than the current state of the art organic-inorganic hybrid TFT devices. The structure comprises a suitable substrate disposed with the following sequence of features: a set of conducting gate electrodes covered with a high dielectric constant insulator, a layer of the organic-inorganic hybrid semiconductor, sets of electrically conducting source and drain electrodes corresponding to each of the gate lines, and an optional passivation layer that can overcoat and protect the device structure. Use of high dielectric constant gate insulators exploits the gate voltage dependence of the organic-inorganic hybrid semiconductor to achieve high field effect mobility levels at very low operating voltages.Type: GrantFiled: November 1, 2000Date of Patent: February 5, 2002Assignee: International Business Machines CorporationInventors: Christos Dimitrios Dimitrakopoulos, Cherie Renee Kagan, David Brian Mitzi
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Patent number: 6344660Abstract: A thin film transistor (TFT) device structure based on an organic semiconductor material, that exhibits a high field effect mobility, high current modulation and a low sub-threshold slope at lower operating voltages than the current state of the art organic TFT devices. The structure comprises a suitable substrate disposed with he following sequence of features: a set of conducting gate electrodes covered with a high dielectric constant insulator, a layer of the organic semiconductor, sets of electrically conducting source and drain electrodes corresponding to each of the gate lines, and an optional passivation layer that can overcoat and protect the device structure. Use of high dielectric constant gate insulators exploits the unexpected gate voltage dependence of the organic semiconductor to achieve high field effect mobility levels at very low operating voltages.Type: GrantFiled: June 2, 1999Date of Patent: February 5, 2002Assignee: International Business Machines CorporationInventors: Christos Dimitrios Dimitrakopoulos, Peter Richard Duncombe, Bruce K. Furman, Robert B. Laibowitz, Deborah Ann Neumayer, Sampath Purushothaman