Abstract: Apparatus, media, methods, and systems are disclosed for improved data relocation based on read-level voltages. A data storage system may include a non-volatile memory device including a source region and a destination region. The destination region may include a first destination block and a second destination block. A controller may read first data in the source region using a first read-level voltage, and read second data in the source region using a second read-level voltage. The controller may associate, based on the first and second read-level voltages, each of the first data and the second data with a respective one of the first and the second destination blocks. The controller may cause each of the first and second data to be stored in the associated one of the first and second destination blocks.

Abstract: Methods and systems for decoding raw data may select a preliminary read-level voltage from a sequence of read-level voltages based on a decoding success indicator and execute a preliminary hard decoding operation to decode raw data read from a plurality of memory cells using the preliminary read-level voltage. If the preliminary hard decoding operation is successful, the decoded data from the hard decoding operation is returned. If the preliminary hard decoding operation is unsuccessful, a multi-stage decoding operation may be executed to decode raw data read from the plurality of memory cells using the sequence of read-level voltages, and returning decoded data from the multi-stage decoding operation upon completion of the multi-stage decoding operation. The decoding success indicator is maintained based on results of the preliminary hard decoding operation or the multi-stage decoding operation.

Abstract: An insulator applied in a probe base including a probe mounting hole, the insulator is a sheet structure having plural through holes, and the probe mounting hole is formed at the center of the insulator, and the probe mounting hole and the through hole penetrate from a first surface to a second surface of the insulator, and the regions of the first and second surfaces without the probe mounting hole and the through hole are coplanar. The probe base has a base body and at least a composite assembly, and the base body has at least a testing zone, and the composite assembly is installed in the testing zone and has at least a probe hole for installing a probe, and the insulator is installed into the probe hole.

Abstract: The present invention provides an active substance of Morchella, its use and a composition thereof for improving disturbance of reproductive function, especially, for manufacturing a pharmaceutical composition to improve disturbance of reproductive function induced by obesity or metabolic syndrome. The composition with the active substance of Morchella can effectively improve the structural integrity of testicular tissues and sperm, increase testosterone levels in the blood, and reduce the oxidation stress in sperms.

Abstract: A gate driving circuit applied to motor inverter includes first power switch circuit, first and second bootstrap fast charging circuits, and first, second and third capacitors. The first power switch circuit includes first and second power switches. The first bootstrap fast charging circuit is electrically connected to the first power switch. The second bootstrap fast charging circuit is electrically connected to the second power switch. The first capacitor is electrically connected to the first power switch. The second capacitor is electrically connected to the first bootstrap fast charging circuit and first insulated switch. The third capacitor is electrically connected to the second bootstrap fast charging circuit and second insulated switch. When the first power switch is disabled and the second power switch is enabled, an independent power supply enables the second bootstrap fast charging circuit to charge the third capacitor to enable the second insulated switch.

Abstract: Polymorphic forms of 3-(4-amino-1-oxo-1,3 dihydro-isoindol-2-yl)-piperidine-2,6-dione are disclosed. Compositions comprising the polymorphic forms, methods of making the polymorphic forms and methods of their use are also disclosed.

Abstract: A fastening device includes a case unit, a spool, a driving unit, a knob and a connecting unit. The case unit includes an annular wall surrounding an inner space, and a base detachably and directly coupled to the annular wall. The spool is located within the inner space. The driving unit is located within the inner space and selectively prohibits the spool from rotating in a loosening direction. The knob is disposed on the annular wall. The connecting unit is connected to at least one of the knob, the spool and the driving unit without passing through the base and restricted by at least one of the annular wall, the spool and the driving unit such that the annular wall, the spool, the driving unit and the knob are combined integrally.

Abstract: The original abstract is amended to “A fastening device includes a case unit, a knob, an engaging unit and a spool. The case unit has an axial direction and includes a plurality of mounting teeth. The knob covers on the case unit along the axial direction. The engaging unit is coupled to the knob and includes an engaging portion. The spool is configured for a lace to wind therearound. The engaging unit is driven by the knob to switch between a first position and a second position along the axial direction. When the engaging unit is in the first position, the engaging unit prohibits the spool from releasing the lace. When the engaging unit is in the second position, the engaging portion is engaged with at least one of the mounting teeth, and the engaging unit does not prohibit the spool from releasing the lace. Therefore, the reliability can be improved.”.

Abstract: A fastening device including a case unit and a spool is provided. The case unit includes a wall forming a receiving space, an upper opening communicated with the receiving space, and a lower opening opposite to the upper opening and communicated with the receiving space. The spool is within the receiving space. The spool is limited by the wall, and the wall prohibits the spool from leaving the receiving space from the upper opening.

Abstract: The present invention provides an active substance of Morchella, its use and a composition thereof for improving disturbance of reproductive function, especially, for manufacturing a pharmaceutical composition to improve disturbance of reproductive function induced by obesity or metabolic syndrome. The composition with the active substance of Morchella can effectively improve the structural integrity of testicular tissues and sperm, increase testosterone levels in the blood, and reduce the oxidation stress in sperms.

Abstract: A positioning module includes a positioning element, an arc-shaped guiding unit, an actuating element, and a magnetic element. The positioning element is rotatably disposed at an object. The arc-shaped guiding unit is disposed between the positioning element and the object and is configured to enable the positioning element to rotate on an arc center of the arc-shaped guiding unit. The actuating element is connected to the positioning element and is configured to drive the positioning element. The magnetic element is disposed at another object and is configured to drive the actuating element. An engaging surface of the object is connected to another engaging surface of the another object, and a position of the actuating element corresponds to the magnetic element, so that a portion of the positioning element extends into another accommodation space of the another object. An electronic device having the positioning module is further provided.

Abstract: A display panel driving chip includes a plurality of gate signal output ports and a plurality of source signal output ports. The source signal output ports outputting a plurality of source signals and the gate signal output ports outputting a plurality of gate signals are interleaved.

Abstract: Methods and systems for decoding raw data may select a preliminary read-level voltage from a sequence of read-level voltages based on a decoding success indicator and execute a preliminary hard decoding operation to decode raw data read from a plurality of memory cells using the preliminary read-level voltage. If the preliminary hard decoding operation is successful, the decoded data from the hard decoding operation is returned. If the preliminary hard decoding operation is unsuccessful, a multi-stage decoding operation may be executed to decode raw data read from the plurality of memory cells using the sequence of read-level voltages, and returning decoded data from the multi-stage decoding operation upon completion of the multi-stage decoding operation. The decoding success indicator is maintained based on results of the preliminary hard decoding operation or the multi-stage decoding operation.

Abstract: Methods, systems, and media for decoding data are described. A sequence of read-level voltages for decoding operations may be determined based on a trend of decoding success indicators, including a first decoding success indicator and a second decoding success indicator. The first decoding success indicator is obtained from a more recent successful decoding operation. The first one of the sequence may be set to a read-level voltage of the first decoding success indicator. If the read-level voltage of the first decoding success indicator is less than a read-level voltage of the second decoding success indicator, then the trend is decreasing, and the second one of the sequence may be set to a read-level voltage less than that of the first one of the sequence. After executing one or more decoding operations, the decoding success indicators may be updated based on the read-level voltage of the current successful decoding operation.

Abstract: Apparatus, media, methods, and systems are disclosed for improved data relocation based on read-level voltages. A data storage system may include a non-volatile memory device including a source region and a destination region. The destination region may include a first destination block and a second destination block. A controller may read first data in the source region using a first read-level voltage, and read second data in the source region using a second read-level voltage. The controller may associate, based on the first and second read-level voltages, each of the first data and the second data with a respective one of the first and the second destination blocks. The controller may cause each of the first and second data to be stored in the associated one of the first and second destination blocks.

Abstract: A gate driving circuit applied to motor inverter includes first power switch circuit, first and second bootstrap fast charging circuits, and first, second and third capacitors. The first power switch circuit includes first and second power switches. The first bootstrap fast charging circuit is electrically connected to the first power switch. The second bootstrap fast charging circuit is electrically connected to the second power switch. The first capacitor is electrically connected to the first power switch. The second capacitor is electrically connected to the first bootstrap fast charging circuit and first insulated switch. The third capacitor is electrically connected to the second bootstrap fast charging circuit and second insulated switch. When the first power switch is disabled and the second power switch is enabled, an independent power supply enables the second bootstrap fast charging circuit to charge the third capacitor to enable the second insulated switch.

Abstract: A driving circuit for a display panel includes a common voltage generating circuit. The common voltage generating circuit is coupled to multiple common electrodes of the display panel and configured to provide multiple common voltages respectively to the common electrodes. During a frame period, the common voltage generating circuit respectively changes a voltage level of the common voltages at different time.

Abstract: Methods and apparatus for cleaving a substrate in a semiconductor chamber. The semiconductor chamber pressure is adjusted to a process pressure, a substrate is then heated to a nucleation temperature of ions implanted in the substrate, the temperature of the substrate is then adjusted below the nucleation temperature of the ions, and the temperature is maintained until cleaving of the substrate occurs. Microwaves may be used to provide heating of the substrate for the processes. A cleaving sensor may be used for detection of successful cleaving by detecting pressure changes, acoustic emissions, changes within the substrate, and/or residual gases given off by the implanted ions when the cleaving occurs.

Abstract: An analog to digital converter (ADC) device includes ADC circuits, a calibration circuit, and a skew adjusting circuit. The ADC circuits are configured to convert an input signal according to interleaved clock signals to generate first quantized outputs. The calibration circuit is configured to perform at least one calibration operation according to the first quantized outputs to generate second quantized outputs. The skew adjusting circuit further includes a first adjusting circuit. The first adjusting circuit is configured to analyze adjacent clock signals according to part of the second quantized outputs to generate adjusting information. The skew adjusting circuit is configured to analyze time difference information within even-numbered sampling periods of the clock signals according to the second quantized outputs and the adjusting information to generate adjustment signals. The adjustment signals are configured to reduce clock skews of the ADC circuits.

Abstract: An analog to digital converter (ADC) device includes ADC circuits, a calibration circuit, and a skew adjusting circuit. The ADC circuits convert an input signal according to interleaved clock signals, in order to generate first quantized outputs. The calibration circuit performs at least one calibration computation according to the first quantized outputs to generate second quantized outputs. The skew adjusting circuit determines calculating signals, to which the second quantized outputs correspond in a predetermined interval, and averages the calculating signals to generate a reference signal, and compares the reference signal with each of the calculating signals to generate detecting signals, and determines whether the detecting signals are adjusted or not according to a signal frequency to generate adjusting signals, in order to reduce a clock skew in the ADC circuits.