Patents by Inventor Chu-Cheng Liang

Chu-Cheng Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080071968
    Abstract: A method of managing blocks of a flash memory device suitable for a flexible correspondence between logic blocks and physical blocks of the flash memory device is provided. First, a sum of good physical blocks and defective physical blocks is calculated. Next, the good physical blocks and the defective physical blocks are distributed into a number of predetermined sectors of a flash memory, wherein each predetermined sector has a predetermined number of temporary blocks in order to equalize the sum of logic blocks and the temporary blocks with the physical blocks in each predetermined sector. The distribution information is recorded into a good physical block. When executing to initialize said flash memory, a control chip locates and reads the block where the distribution information is stored and stores the distribution information into a SRAM of said control chip to create a block correspondence chart in the predetermined sector to manage said flash memory.
    Type: Application
    Filed: September 18, 2006
    Publication date: March 20, 2008
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Ming-Jen Liang, Chu-Cheng Liang
  • Patent number: 7206893
    Abstract: A method of reducing the frequency of erasing steps of a flash memory is described. A linking method under a mother and a child block architecture for building a check area and a logic page of the child block in order to reduce the frequency of erasing steps of the flash memory so that the service life of the flash memory can be extended and also the processing speed can be promoted.
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: April 17, 2007
    Assignee: Phison Electronics Corp.
    Inventors: Wee-Kuan Gan, Chu-Cheng Liang
  • Publication number: 20050132125
    Abstract: A method of reducing the frequency of erasing steps of a flash memory is described. A linking method under a mother and a child block architecture for building a check area and a logic page of the child block in order to reduce the frequency of erasing steps of the flash memory so that the service life of the flash memory can be extended and also the processing speed can be promoted.
    Type: Application
    Filed: December 12, 2003
    Publication date: June 16, 2005
    Inventors: Wee-Kuan Gan, Chu-Cheng Liang
  • Patent number: 6876579
    Abstract: A method of writing data to a large block of a flash memory cell is disclosed. When the processor writes data to the flash memory cell, if the changed data can not fill up the whole page, the processor will pick a block from one of the backed up blocks in the flash memory cell using as a special block for storing changed data temporarily, and continue to write the next changed data into the special block until whole space in the page is filled up. When the page is completely filled, then the data stored temporarily in the special block is moved to a buffer of the backed up block and then the special block is erased so that it can be used as a back up block, thus when writing data to flash memory cell, even when the change of data is unable fully fill up the whole page, the changed data still can be written continuously, and therefore the writing speed can be substantially increased.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: April 5, 2005
    Assignee: Phison Electronics Corp.
    Inventors: Chu-Cheng Liang, Chee-Kong Awyong, Khein-Seng Pua
  • Publication number: 20050030791
    Abstract: A method of writing data to a large block of a flash memory cell is disclosed. When the processor writes data to the flash memory cell, if the changed data can not fill up the whole page, the processor will pick a block from one of the backed up blocks in the flash memory cell using as a special block for storing changed data temporarily, and continue to write the next changed data into the special block until whole space in the page is filled up. When the page is completely filled, then the data stored temporarily in the special block is moved to a buffer of the backed up block and then the special block is erased so that it can be used as a back up block, thus when writing data to flash memory cell, even when the change of data is unable fully fill up the whole page, the changed data still can be written continuously, and therefore the writing speed can be substantially increased.
    Type: Application
    Filed: August 4, 2003
    Publication date: February 10, 2005
    Applicant: Phison Electronics Corp.
    Inventors: Chu-Cheng Liang, Chee-Kong Awyong, Khein-Seng Pua
  • Publication number: 20040255054
    Abstract: A high-speed data transmission device is provided. The high-speed data transmission device comprises a controller for converting a data complaint with a serial port interface into a data complaint with a parallel port interface, a controller for converting a data complaint with a parallel port interface for transmitting into a Flash RAM like memory storage element. The controller that converts the data complaint with the parallel port interface for transmitting into a Flash RAM like memory storage element is controlled by the controller for converting the data complaint with the serial port interface into the data complaint with the parallel port interface.
    Type: Application
    Filed: June 10, 2003
    Publication date: December 16, 2004
    Inventors: Khein-Seng Pua, Chu-Cheng Liang
  • Publication number: 20040240272
    Abstract: The personal digital device of the present invention comprises a flash memory that comprises one or more than one signal marks representing related preset parameter(s) or information for the player in the free space, the preset parameter(s) or information is, for example, music, volume, vision, playing sequence and so on. Thus when the user turns on the player, the controller within the player identifies and retrieves the signal mark stored in the free space of the flash memory, and retrieve the preset parameters or information previously stored or set as the signal mark, and therefore the player is capable of reproducing preset parameters or information. Thus, the inconvenience of setting, for example, sound, volume of the sound, vision and the like, each time the player is turned on can be effectively eliminated.
    Type: Application
    Filed: June 2, 2003
    Publication date: December 2, 2004
    Inventors: Hon-Wai Ng, Li-Pai Chen, Chu-Cheng Liang