Abstract: The present disclosure relates to methods and apparatus for graphical processing. A processing unit may generate or utilize different versions of a GPU program based on hardware resources allocated to the GPU program at runtime. The processing unit may be configured to generate a first version of a GPU program that accesses a resource from a global memory of the processing unit 120 and a second version of the GPU program that access the resource from a fast shared resource of the processing unit 120. The processing unit may utilize the first version of the GPU program if the resource cannot be stored on the fast shared resource allocated to the GPU program at run time, and may utilize the second version of the GPU program if the resource can be stored on the fast shared resource allocated to the GPU program at run time.

Abstract: In one example, a device includes one or more processors configured to determine a set of optimization pass configuration data for code of a software program to be compiled, wherein the optimization pass configuration data defines a sequence of optimization passes for the software program during compilation, and execute the sequence of optimization passes on code for the software program based on the set of optimization pass configuration data.

Abstract: An apparatus includes a memory and a compiling processor configured to: generate, by at least one of a group consisting of a compiler and a runtime executing on the compiling processor, arguments for executing a compiled kernel, determine, by the at least one of the group executing on the compiling processor, whether a first memory reference to a first memory region and a second memory reference to a second memory region of the arguments refer to a same memory region, generate, by the at least one of the group, metadata associated with the first memory reference and the second memory reference based on the determination, wherein the metadata indicates a relationship between the first memory region and the second memory region. The at least one of the compiler and the runtime may recompile the kernel based on the metadata, and instruct a target processor to execute the recompiled kernel.

Abstract: An apparatus includes a memory and a compiling processor configured to: generate, by at least one of a group consisting of a compiler and a runtime executing on the compiling processor, arguments for executing a compiled kernel, determine, by the at least one of the group executing on the compiling processor, whether a first memory reference to a first memory region and a second memory reference to a second memory region of the arguments refer to a same memory region, generate, by the at least one of the group, metadata associated with the first memory reference and the second memory reference based on the determination, wherein the metadata indicates a relationship between the first memory region and the second memory region. The at least one of the compiler and the runtime may recompile the kernel based on the metadata, and instruct a target processor to execute the recompiled kernel.

Abstract: In one example, a device includes one or more processors configured to determine an allocated time for execution of an optimization pass for optimizing code for a software program, execute at least some instructions of the optimization pass on the code, and, in response to determining that an actual time for execution of the optimization pass has exceeded the allocated time for execution, preventing execution of subsequent instructions of the optimization pass.

Abstract: In one example, a device includes one or more processors configured to determine an allocated time for execution of an optimization pass for optimizing code for a software program, execute at least some instructions of the optimization pass on the code, and, in response to determining that an actual time for execution of the optimization pass has exceeded the allocated time for execution, preventing execution of subsequent instructions of the optimization pass.

Abstract: In one example, a device includes one or more processors configured to determine a set of optimization pass configuration data for code of a software program to be compiled, wherein the optimization pass configuration data defines a sequence of optimization passes for the software program during compilation, and execute the sequence of optimization passes on code for the software program based on the set of optimization pass configuration data.

Abstract: A method of compressing instructions in a program may include extracting unique bit patterns from the instructions in the program and constructing a linear programming formulation or an integer programming formulation from the unique bit patterns, the instructions, and/or the size of a memory storage. The linear programming formulation or the integer programming formulation may be solved to produce a solution. The method may include compressing at least some of the instructions based on the solution by storing at least some of the unique bit patterns in a memory and placing corresponding indices to the memory in new compressed instructions.

Abstract: A method to optimize speculative parallel thread execution comprises selecting a plurality of partition candidate pairs for speculative parallel thread execution, transforming each partition candidate pair of the plurality of partition candidate pairs to improve the expected performance gain of each pair, and selecting a set of one or more transformed partition candidate pairs that do not interfere with each other and produce a maximum expected performance gain.

Abstract: Disclosed are embodiments of a compiler, methods, and system for resource-aware scheduling of instructions. A list scheduling approach is augmented to take into account resource constraints when determining priority for scheduling of instructions. Other embodiments are also described and claimed.

Abstract: A method of compressing instructions in a program may include extracting unique bit patterns from the instructions in the program and constructing a linear programming formulation or an integer programming formulation from the unique bit patterns, the instructions, and/or the size of a memory storage. The linear programming formulation or the integer programming formulation may be solved to produce a solution. The method may include compressing at least some of the instructions based on the solution by storing at least some of the unique bit patterns in a memory and placing corresponding indices to the memory in new compressed instructions.

Abstract: In some embodiments, a data structure may be received in a first processing system. The data structure may represent a plurality of instructions for a second processing system. For at least one instruction of the plurality of instructions, a determination may be made as to whether the instruction can be replaced by a compact instruction for the second processing system. A compact instruction may be generated if the instruction can be replaced by a compact instruction. In some embodiments, an instruction may be received in a processing system. A determination may be made as to whether the instruction is a compact instruction. A decompacted instruction may be generated if the instruction is a compact instruction.

Abstract: A Markov chain model of a software system may be used to compute all-pairs reaching probabilities to provide guidance in performing speculative operations with respect to the software system.

Abstract: A method to optimize speculative parallel thread execution comprises selecting a plurality of partition candidate pairs for speculative parallel thread execution, transforming each partition candidate pair of the plurality of partition candidate pairs to improve the expected performance gain of each pair, and selecting a set of one or more transformed partition candidate pairs that do not interfere with each other and produce a maximum expected performance gain.

Abstract: Disclosed are embodiments of a compiler, methods, and system for resource-aware scheduling of instructions. A list scheduling approach is augmented to take into account resource constraints when determining priority for scheduling of instructions. Other embodiments are also described and claimed.

Abstract: A Markov chain model of a software system may be used to compute all-pairs reaching probabilities to provide guidance in performing speculative operations with respect to the software system.

Abstract: An apparatus, method, and program product for optimizing code that contains dynamically-allocated memory. The aliasing behavior of internal pointers of dynamically-allocated memory is used to disambiguate memory accesses and to eliminate false data dependencies. It is determined whether a dynamically-allocated array will behave like a statically-allocated array throughout the entire program execution once it has been allocated. This determination is used to improve the instruction scheduling efficiency, which yields better performance.

Abstract: An apparatus, method, and program product for optimizing code that contains dynamically-allocated memory. The aliasing behavior of internal pointers of dynamically-allocated memory is used to disambiguate memory accesses and to eliminate false data dependencies. It is determined whether a dynamically-allocated array will behave like a statically-allocated array throughout the entire program execution once it has been allocated. This determination is used to improve the instruction scheduling efficiency, which yields better performance.