Abstract: A method for manufacturing a pixel unit includes the following steps. A channel layer is formed. A first pattern layer is formed above the channel layer and includes a scan line and a gate electrode. A second pattern layer is formed above the first pattern layer and includes a data line and a source electrode, where the source electrode is electrically connected to the channel layer. A third pattern layer is formed above the second pattern layer and includes a drain electrode and an auxiliary electrode, where the drain electrode is electrically connected to the channel layer. The auxiliary electrode is electrically connected to the scan line through a first contact hole.

Abstract: A pixel structure includes a first insulating layer, a second metal layer, a second insulating layer, and a third metal layer. The second metal layer is disposed on the first insulating layer, and the second metal layer includes at least one first data line, at least one source, and at least one first drain, wherein the first data line is electrically connected to the source. The second insulating layer is disposed on the second metal layer, the second insulating layer includes at least one opening that is disposed corresponding to the first drain, and the area of the opening is greater than the area of the first drain. The third metal layer includes at least one second drain that is electrically connected to the first drain, the second drain is disposed corresponding to the opening and disposed on the first drain.

Abstract: A method for manufacturing a pixel unit includes the following steps. A channel layer is formed. A first pattern layer is formed above the channel layer and includes a scan line and a gate electrode. A second pattern layer is formed above the first pattern layer and includes a data line and a source electrode, where the source electrode is electrically connected to the channel layer. A third pattern layer is formed above the second pattern layer and includes a drain electrode and an auxiliary electrode, where the drain electrode is electrically connected to the channel layer. The auxiliary electrode is electrically connected to the scan line through a first contact hole.

Abstract: An active device of a pixel structure includes a semiconductor layer, an insulation layer covering the semiconductor layer, a gate electrode disposed on the insulation layer and electrically connected to a scan line, a protection layer covering the gate electrode, a source electrode and a drain electrode electrically connected to a source region and a drain region of the semiconductor layer. A channel region is disposed between the source region and the drain region. A source lightly doped region is disposed between the channel region and the source region. A drain lightly doped region is disposed between the channel region and the drain region. The light shielding pattern shields the source lightly doped region and the drain lightly doped region. The light shielding pattern is overlapped with one side of the scan line and not overlapped with another side of the scan line.

Abstract: A pixel structure includes a first insulating layer, a second metal layer, a second insulating layer, and a third metal layer. The second metal layer is disposed on the first insulating layer, and the second metal layer includes at least one first data line, at least one source, and at least one first drain, wherein the first data line is electrically connected to the source. The second insulating layer is disposed on the second metal layer, the second insulating layer includes at least one opening that is disposed corresponding to the first drain, and the area of the opening is greater than the area of the first drain. The third metal layer includes at least one second drain that is electrically connected to the first drain, the second drain is disposed corresponding to the opening and disposed on the first drain.

Abstract: An active device of a pixel structure includes a semiconductor layer, an insulation layer covering the semiconductor layer, a gate electrode disposed on the insulation layer and electrically connected to a scan line, a protection layer covering the gate electrode, a source electrode and a drain electrode electrically connected to a source region and a drain region of the semiconductor layer. A channel region is disposed between the source region and the drain region. A source lightly doped region is disposed between the channel region and the source region. A drain lightly doped region is disposed between the channel region and the drain region. The light shielding pattern shields the source lightly doped region and the drain lightly doped region. The light shielding pattern is overlapped with one side of the scan line and not overlapped with another side of the scan line.

Abstract: An active device of a pixel structure includes a semiconductor layer, an insulation layer covering the semiconductor layer, a gate electrode disposed on the insulation layer and electrically connected to a scan line, a protection layer covering the gate electrode, a source electrode and a drain electrode electrically connected to a source region and a drain region of the semiconductor layer. A channel region is disposed between the source region and the drain region. A source lightly doped region is disposed between the channel region and the source region. A drain lightly doped region is disposed between the channel region and the drain region. The light shielding pattern shields the source region, the drain region, the source lightly doped region and the drain lightly doped region. The light shielding pattern is overlapped with one side of the scan line and not overlapped with another side of the scan line.

Abstract: An active device of a pixel structure includes a semiconductor layer, an insulation layer covering the semiconductor layer, a gate electrode disposed on the insulation layer and electrically connected to a scan line, a protection layer covering the gate electrode, a source electrode and a drain electrode electrically connected to a source region and a drain region of the semiconductor layer. A channel region is disposed between the source region and the drain region. A source lightly doped region is disposed between the channel region and the source region. A drain lightly doped region is disposed between the channel region and the drain region. The light shielding pattern shields the source region, the drain region, the source lightly doped region and the drain lightly doped region. The light shielding pattern is overlapped with one side of the scan line and not overlapped with another side of the scan line.