Patents by Inventor Chu-kuang Liu
Chu-kuang Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150340450Abstract: An edge terminal structure of a power semiconductor device includes a second conductive-type substrate, a first conductive-type buffer layer, a first conductive-type epitaxial layer, a first and a second electrodes, and a first and a second field plates. A trench is in a surface of the first conductive-type epitaxial layer in an edge terminal area beside an active area of the power semiconductor device. The first field plate includes at least a L-shaped electric-plate, a gate insulation layer under the L-shaped electric-plate, and the first electrode on the L-shaped electric-plate. The second field plate includes a portion of the first electrode and at least an insulation layer between the portion of the first electrode and the first conductive-type epitaxial layer. The insulation layer covers the tail of the trench and completely covers the L-shaped electric-plate.Type: ApplicationFiled: August 6, 2015Publication date: November 26, 2015Inventor: Chu-Kuang Liu
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Patent number: 9153652Abstract: An edge terminal structure of a power semiconductor device is provided that includes a substrate, a first and a second electrodes disposed on a surface and a back of the substrate respectively, a first field plate, and a second field plate. The power semiconductor device includes an active area and an edge termination area, and there is a trench in a surface of the substrate in the edge terminal area beside the active area. The first field plate is disposed on a sidewall of the trench and extends on a tail of the trench, and it includes at least a L-shaped electric-plate, a gate insulation layer under the L-shaped electric-plate, and the first electrode on the L-shaped electric-plate. The second field plate includes at least an insulation layer and the first electrode thereon. The insulation layer covers the tail of the trench and a tail of the L-shaped electric-plate further.Type: GrantFiled: September 12, 2012Date of Patent: October 6, 2015Assignee: Excelliance MOS CorporationInventor: Chu-Kuang Liu
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Patent number: 9071079Abstract: The present disclosure provides a power supply system. The power supply system includes a plurality of power supply devices connected in parallel. Output terminals of the plurality of power supply devices are coupled to a common supply line. Each of the plurality of power supply devices includes a DC-to-DC converter, a transformer, a switching control device, a rectifying device, and a judging device. The judging device receives a feedback voltage, an error signal and a second AC voltage to determine whether the power supply device is normal, wherein the feedback voltage is a voltage division of an output voltage on the common supply line, the error signal is an output of the switching control device, and the second AC voltage is retrieved from a second winding set of the transformer.Type: GrantFiled: October 17, 2011Date of Patent: June 30, 2015Assignee: DELTA ELECTRONICS, INC.Inventors: Chu Kuang Liu, Ching Long Tsai, Hung Liang Cho, Wei Hsin Wen
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Patent number: 8664714Abstract: A power MOSFET includes an epitaxy substrate, conductive trenches, well regions and a dielectric layer. The power MOSFET further has at least one termination structure including at lest one of the conductive trenches, some of the well regions within a termination area and mutually insulated by the conductive trench, a field plate, a contact plug and a heavily-doped region. The field plate including a plate metal and the dielectric layer is on the well regions and the conductive trench within the termination area. The contact plug penetrates through the dielectric layer and connects the plate metal and one of the well regions, so the plate metal has equal potential with the connected well region through the contact plug. The well regions and the conductive trench are electrically coupled to the plate metal by the dielectric layer. The heavily-doped region is between the contact plug and the connected well region.Type: GrantFiled: August 28, 2012Date of Patent: March 4, 2014Assignee: Excelliance MOS CorporationInventor: Chu-Kuang Liu
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Publication number: 20130313634Abstract: An edge terminal structure of a power semiconductor device is provided that includes a substrate, a first and a second electrodes disposed on a surface and a back of the substrate respectively, a first field plate, and a second field plate. The power semiconductor device includes an active area and an edge termination area, and there is a trench in a surface of the substrate in the edge terminal area beside the active area. The first field plate is disposed on a sidewall of the trench and extends on a tail of the trench, and it includes at least a L-shaped electric-plate, a gate insulation layer under the L-shaped electric-plate, and the first electrode on the L-shaped electric-plate. The second field plate includes at least an insulation layer and the first electrode thereon. The insulation layer covers the tail of the trench and a tail of the L-shaped electric-plate further.Type: ApplicationFiled: September 12, 2012Publication date: November 28, 2013Applicant: EXCELLIANCE MOS CORPORATIONInventor: Chu-Kuang Liu
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Publication number: 20130248986Abstract: A power MOSFET includes an epitaxy substrate, conductive trenches, well regions and a dielectric layer. The power MOSFET further has at least one termination structure including at lest one of the conductive trenches, some of the well regions within a termination area and mutually insulated by the conductive trench, a field plate, a contact plug and a heavily-doped region. The field plate including a plate metal and the dielectric layer is on the well regions and the conductive trench within the termination area. The contact plug penetrates through the dielectric layer and connects the plate metal and one of the well regions, so the plate metal has equal potential with the connected well region through the contact plug. The well regions and the conductive trench are electrically coupled to the plate metal by the dielectric layer. The heavily-doped region is between the contact plug and the connected well region.Type: ApplicationFiled: August 28, 2012Publication date: September 26, 2013Applicant: EXCELLIANCE MOS CORPORATIONInventor: Chu-Kuang Liu
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Patent number: 8518778Abstract: A method of forming a semiconductor structure is provided. A second area is between first and third areas. An epitaxial layer is formed on a substrate. A first gate is formed in the epitaxial layer and partially in first and second areas. A second gate is formed in the epitaxial layer and partially in second and third areas. A body layer is formed in the epitaxial layer in first and second areas. A doped region is formed in the body layer in the first area. All of the doped region, the epitaxial layer and the second gate are partially removed to form a first opening in the doped region and in the body layer in the first area, and form a second opening in the epitaxial layer in the third area and in a portion of the second gate. A first metal layer is filled in first and second openings.Type: GrantFiled: May 25, 2012Date of Patent: August 27, 2013Assignee: Excelliance MOS CorporationInventor: Chu-Kuang Liu
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Patent number: 8421180Abstract: A semiconductor structure is provided. A second area is disposed between first and third areas. An epitaxial layer is on a substrate. A body layer is in the epitaxial layer in first and second areas. First and second gates are in the body layer and in a portion of the epitaxial layer. The first gate is in the substrate and partially in first and second areas. The second gate is in the substrate and partially in second and third areas. A first contact plug is in a portion of the body layer in the first area. A second contact plug is at least in the epitaxial layer in the third area and contacts the epitaxial layer and the second gate. The first contact plug is electrically connected to the second contact plug. A first doped region is in the body layer between the first contact plug and the first gate.Type: GrantFiled: May 25, 2012Date of Patent: April 16, 2013Assignee: Excelliance MOS CorporationInventor: Chu-Kuang Liu
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Publication number: 20120235231Abstract: A semiconductor structure is provided. A second area is disposed between first and third areas. An epitaxial layer is on a substrate. A body layer is in the epitaxial layer in first and second areas. First and second gates are in the body layer and in a portion of the epitaxial layer. The first gate is in the substrate and partially in first and second areas. The second gate is in the substrate and partially in second and third areas. A first contact plug is in a portion of the body layer in the first area. A second contact plug is at least in the epitaxial layer in the third area and contacts the epitaxial layer and the second gate. The first contact plug is electrically connected to the second contact plug. A first doped region is in the body layer between the first contact plug and the first gate.Type: ApplicationFiled: May 25, 2012Publication date: September 20, 2012Applicant: EXCELLIANCE MOS CORPORATIONInventor: Chu-Kuang Liu
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Publication number: 20120231595Abstract: A method of forming a semiconductor structure is provided. A second area is between first and third areas. An epitaxial layer is formed on a substrate. A first gate is formed in the epitaxial layer and partially in first and second areas. A second gate is formed in the epitaxial layer and partially in second and third areas. A body layer is formed in the epitaxial layer in first and second areas. A doped region is formed in the body layer in the first area. All of the doped region, the epitaxial layer and the second gate are partially removed to form a first opening in the doped region and in the body layer in the first area, and form a second opening in the epitaxial layer in the third area and in a portion of the second gate. A first metal layer is filled in first and second openings.Type: ApplicationFiled: May 25, 2012Publication date: September 13, 2012Applicant: EXCELLIANCE MOS CORPORATIONInventor: Chu-Kuang Liu
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Publication number: 20120212059Abstract: The present disclosure provides a power supply system. The power supply system includes a plurality of power supply devices connected in parallel. Output terminals of the plurality of power supply devices are coupled to a common supply line. Each of the plurality of power supply devices includes a DC-to-DC converter, a transformer, a switching control device, a rectifying device, and a judging device. The judging device receives a feedback voltage, an error signal and a second AC voltage to determine whether the power supply device is normal, wherein the feedback voltage is a voltage division of an output voltage on the common supply line, the error signal is an output of the switching control device, and the second AC voltage is retrieved from a second winding set of the transformer.Type: ApplicationFiled: October 17, 2011Publication date: August 23, 2012Inventors: Chu Kuang Liu, Ching Long Tsai, Hung Liang Cho, Wei Hsin Wen
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Patent number: 8222678Abstract: A semiconductor structure including a substrate, at least one power MOSFET, a floating diode or a body diode, and at least one Schottky diode is provided. The substrate has a first area, a second area and a third area. The second area is between the first area and the third area. The at least one power MOSFET is in the first area. The floating diode or the body diode is in the second area. The at least one Schottky diode is in the third area. Further, the contact plugs of the power MOSFET and the Schottky diode include tungsten and are electronically connected to each other.Type: GrantFiled: August 17, 2009Date of Patent: July 17, 2012Assignee: Excelliance MOS CorporationInventor: Chu-Kuang Liu
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Publication number: 20110037113Abstract: A semiconductor structure including a substrate, at least one power MOSFET, a floating diode or a body diode, and at least one Schottky diode is provided. The substrate has a first area, a second area and a third area. The second area is between the first area and the third area. The at least one power MOSFET is in the first area. The floating diode or the body diode is in the second area. The at least one Schottky diode is in the third area. Further, the contact plugs of the power MOSFET and the Schottky diode include tungsten and are electronically connected to each other.Type: ApplicationFiled: August 17, 2009Publication date: February 17, 2011Applicant: EXCELLIANCE MOS CORPORATIONInventor: Chu-Kuang Liu
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Patent number: 6639816Abstract: A power supply system having AC redundant power supplies and a safety device is constituted by a plurality of AC power sources, each of the AC power sources is directly coupled in series with a corresponding one of the DC power supplies which are connected in parallel for outputting a voltage, for providing an AC voltage to operate the corresponding one of the DC power supplies, a control circuit coupled between the AC power sources and the DC power supply which is not directly coupled in series with a corresponding one of AC power sources for creating a conductive path to transfer the AC voltage from one of the AC power sources to the DC power supply which is not directly coupled in series with a corresponding one of AC power sources when the other AC power source is abnormally interrupted in supplying an AC voltage to operate the DC power supplies, and a safe device for preventing the AC power sources from getting short-circuited caused by the inlet of the power supply system being plugged into the outlet oType: GrantFiled: September 6, 2001Date of Patent: October 28, 2003Assignee: Delta Electronics, Inc.Inventor: Chu-Kuang Liu
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Patent number: 6608403Abstract: A power supply system with AC redundant power sources and DC redundant power supplies includes a plurality of AC power sources, each of the AC power sources is directly coupled in series with a corresponding one of the DC power supplies which are connected in parallel for outputting a voltage, for providing an input voltage to operate the corresponding one of the DC power supplies, and a control module coupled between the AC power sources and the DC power supply which is not directly coupled in series with a corresponding one of AC power sources for creating a conductive path to transfer the input voltage from one of the AC power sources to the DC power supply which is not directly coupled in series with a corresponding one of AC power sources when the other AC power source are abnormally interrupted in supplying an input voltage to operate the DC power supplies.Type: GrantFiled: September 20, 2001Date of Patent: August 19, 2003Assignee: Delta Electronics, Inc.Inventors: Chu-Kuang Liu, Ching-Hsiang Chan
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Publication number: 20020145895Abstract: A power supply system having AC redundant power supplies and a safety device is constituted by a plurality of AC power sources, each of the AC power sources is directly coupled in series with a corresponding one of the DC power supplies which are connected in parallel for outputting a voltage, for providing an AC voltage to operate the corresponding one of the DC power supplies, a control circuit coupled between the AC power sources and the DC power supply which is not directly coupled in series with a corresponding one of AC power sources for creating a conductive path to transfer the AC voltage from one of the AC power sources to the DC power supply which is not directly coupled in series with a corresponding one of AC power sources when the other AC power source is abnormally interrupted in supplying an AC voltage to operate the DC power supplies, and a safe device for preventing the AC power sources from getting short-circuited caused by the inlet of the power supply system being plugged into the outlet oType: ApplicationFiled: September 6, 2001Publication date: October 10, 2002Applicant: Delta Electronics, Inc.Inventor: Chu-Kuang Liu
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Publication number: 20020145339Abstract: A power supply system with AC redundant power sources and DC redundant power supplies includes a plurality of AC power sources, each of the AC power sources is directly coupled in series with a corresponding one of the DC power supplies which are connected in parallel for outputting a voltage, for providing an input voltage to operate the corresponding one of the DC power supplies, and a control module coupled between the AC power sources and the DC power supply which is not directly coupled in series with a corresponding one of AC power sources for creating a conductive path to transfer the input voltage from one of the AC power sources to the DC power supply which is not directly coupled in series with a corresponding one of AC power sources when the other AC power source are abnormally interrupted in supplying an input voltage to operate the DC power supplies.Type: ApplicationFiled: September 20, 2001Publication date: October 10, 2002Inventors: Chu-Kuang Liu, Ching-Hsiang Chan
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Patent number: 6204612Abstract: A device for discharging charges from a capacitor of a power system is disclosed. The discharge device includes a discharge loop electrically connected to the capacitor for providing a discharging passageway for the charges to be safely discharged therethrough, and a control loop electrically connected to the capacitor for actuating the discharge loop start to discharge at the moment when the power system is suddenly powered off.Type: GrantFiled: December 8, 1999Date of Patent: March 20, 2001Assignee: Delta Electronics Inc.Inventor: Chu-kuang Liu