Patents by Inventor Chuan-Bing Li

Chuan-Bing Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190176020
    Abstract: A striking assist method for a ball game such as snooker on a bounded table, a striking assist system, and a portable electronic device are described. The striking assist method includes acquiring pictures or videos of a snooker table in play, analyzing positions of balls in the pictures and the videos to get positions, calculating a striking path of at least one ball according to the position, and providing a striking suggestion to a user according to the striking path. The striking suggestion can be graphically or audibly provided to the user through the portable electronic device.
    Type: Application
    Filed: February 15, 2019
    Publication date: June 13, 2019
    Inventor: CHUAN-BING LI
  • Patent number: 7745737
    Abstract: A printed circuit board (PCB) having vias for reducing reflections of input signals includes a first signal layer, a second signal layer, one via, an input signal line arranged on the first signal layer, and an output signal line arranged on the second signal layer. The via further includes a drill hole, a first pad, and a second pad. The first pad is electrically connected with the input signal line, and the second pad is electrically connected with the output signal line. An outer diameter of the first pad is smaller than an outer diameter of the second pad.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: June 29, 2010
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Yu-Hsu Lin, Shang-Tsang Yeh, Chao-Chen Huang, Chuan-Bing Li
  • Patent number: 7545233
    Abstract: A layout configuration of a differential pair for a printed circuit board (PCB) having a signal plane is provided. In a preferred embodiment, the layout configuration comprises: a differential pair on the signal plane; a pair of vias abutting the differential pair, and the pair of vias being mutually dissymmetrical about the differential pair; and a distance between the pair of vias along the differential pair being equal to ½ TV, wherein T is a signal rise time, V is a speed of the signal. Therefore, the layout configuration can meet with the requirements of impedance matching, reduce reflection, and improve signal integrity.
    Type: Grant
    Filed: June 5, 2006
    Date of Patent: June 9, 2009
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Yu-Hsu Lin, Shang-Tsang Yeh, Chuan-Bing Li
  • Publication number: 20070089072
    Abstract: A signal transmission structure includes an aggressor line and a victim line parallel with the aggressor line, and a number of delay portions formed in the victim line. Noise due to crosstalk passing through the delay portion is delayed an amount of time equal to or greater than a rise time of a signal transmitted in the aggressor line. It is of advantage that introducing the delay portions into a victim line of parallel transmission lines can reduce crosstalk caused by mutual inductance and mutual capacitance between the parallel transmission lines.
    Type: Application
    Filed: August 18, 2006
    Publication date: April 19, 2007
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: YU-HSU LIN, SHANG-TSANG YEH, CHUAN-BING LI
  • Publication number: 20070074905
    Abstract: A method is for controlling an impedance of a via of a printed circuit board. The Via is connected with a trace and includes a drill hole, a pad and an anti-pad. The method includes steps of: building a math model; testing whether an impedance of the via matching with an impedance of the trace; analyzing the impedance of the via if passing the testing; and adjusting parameters of the pad, the anti-pad, and the drill hole if fails testing, and returning to the simulating step, till impedance matching achieved. The method which can efficiently keep signals integrality and increase signal transmission speed.
    Type: Application
    Filed: March 29, 2006
    Publication date: April 5, 2007
    Applicant: HON HAI Precision Industry CO., LTD.
    Inventors: Yu-Hsu Lin, Shang-Tsang Yeh, Chuan-Bing Li
  • Publication number: 20070045000
    Abstract: A printed circuit board includes improved via for improving signal integrity. The printed circuit board includes a first layer, a second layer, a third layer and a via. The via includes a drill hole, a first pad and a second pad. The first pad is defined in the first layer, and the second pad is defined in the second layer. The drill hole is transversely defined through the first layer and the second layer. A void is defined in the third layer corresponding to the second pad. The PCB attenuates signal reflection when the signal is transmitted through the via improving signal integrity.
    Type: Application
    Filed: April 28, 2006
    Publication date: March 1, 2007
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: YU-HSU LIN, SHANG-TSANG YEH, CHAO-CHEN HUANG, CHUAN-BING LI
  • Publication number: 20070017696
    Abstract: A multi-layer printed circuit board (PCB) is provided allowing balanced power supply to components requiring large working current. The PCB includes a plurality of layers disposed thereon. A first power area, and a second power area are separately arranged on different layers. The first power area and the second power area vertically aligned within the PCB with generally identical shapes cooperatively provide power to components requiring large working current.
    Type: Application
    Filed: July 18, 2006
    Publication date: January 25, 2007
    Applicant: HON HAI Precision Industry CO., LTD.
    Inventors: Yu-Hsu Lin, Shang-Tsang Yeh, Chao-Chen Huang, Chuan-Bing Li
  • Publication number: 20070000691
    Abstract: A printed circuit board (PCB) having vias for reducing reflections of input signals includes a first signal layer, a second signal layer, one via, an input signal line arranged on the first signal layer, and an output signal line arranged on the second signal layer. The via further includes a drill hole, a first pad, and a second pad. The first pad is electrically connected with the input signal line, and the second pad is electrically connected with the output signal line. An outer diameter of the first pad is smaller than an outer diameter of the second pad.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 4, 2007
    Applicant: HON HAI Precision Industry CO., LTD.
    Inventors: Yu-Hsu Lin, Shang-Tsang Yeh, Chao-Chen Huang, Chuan-Bing Li
  • Publication number: 20060284697
    Abstract: A layout configuration of a differential pair for a printed circuit board (PCB) having a signal plane is provided. In a preferred embodiment, the layout configuration comprises: a differential pair on the signal plane; a pair of vias abutting the differential pair, and the pair of vias being mutually dissymmetrical about the differential pair; and a distance between the pair of vias along the differential pair being equal to ½ TV, wherein T is a signal rise time, V is a speed of the signal. Therefore, the layout configuration can meet with the requirements of impedance matching, reduce reflection, and improve signal integrity.
    Type: Application
    Filed: June 5, 2006
    Publication date: December 21, 2006
    Applicant: HON HAI Precision Industry CO., LTD.
    Inventors: Yu-Hsu Lin, Shang-Tsang Yeh, Chuan-Bing Li
  • Publication number: 20060266549
    Abstract: A printed circuit board (PCB) with crosstalk reduction arrangement of differential vias includes a plurality of groups of differential vias, a plurality of signal lines corresponding to the differential vias, and a plurality of layers electrically connected with each other by the differential vias and signal lines. Each group of differential vias comprises a first pair of differential vias and a second pair of differential vias. Straight lines from a center of one of the first pair of vias to a center of another of the first pair of vias and from a center of one of the second pair of differential vias to a center of another of the second pair of differential vias are mutually perpendicularly bisecting.
    Type: Application
    Filed: March 27, 2006
    Publication date: November 30, 2006
    Applicant: HON HAI Precision Industry CO., LTD.
    Inventors: Yu-Hsu Lin, Shang-Tsang Yeh, Chuan-Bing Li
  • Publication number: 20060237228
    Abstract: A printed circuit board (PCB) includes a signal layer, a transmission line on the signal layer, a drill hole penetrating the signal layer, and a pad on the signal layer encircling the drill hole, wherein the pad includes an annular region and at least a port extending out from the annular region to connect with the transmission line.
    Type: Application
    Filed: April 13, 2006
    Publication date: October 26, 2006
    Applicant: HON HAI Precision Industry CO., LTD.
    Inventors: Yu-Hsu Lin, Shang-Tsang Yeh, Chuan-Bing Li