Patents by Inventor Chuan-Chang Wu

Chuan-Chang Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230007939
    Abstract: A method for a clean procedure during manufacturing a semiconductor device, includes: providing a patterned sacrificial gate structure including a gate dielectric and a sacrificial layer; wherein the patterned sacrificial gate structure is embedded in a dielectric layer and an upper surface of the sacrificial layer is exposed; performing a first etching process to remove the sacrificial layer; and performing a hydrophilic treatment and a hydrophobic treatment to remove a residue of the sacrificial layer.
    Type: Application
    Filed: August 2, 2021
    Publication date: January 12, 2023
    Inventors: Chuan-Chang WU, Zhen WU, Hsuan-Hsu CHEN, Chun-Lung CHEN
  • Patent number: 11476348
    Abstract: A manufacturing method of a semiconductor device includes the following steps. First patterned structures are formed on a substrate. Each of the first patterned structures includes a first semiconductor pattern and a first bottom protection pattern disposed between the first semiconductor pattern and the substrate. A first protection layer is formed on the first patterned structures and the substrate. A part of the first protection layer is located between the first patterned structures. A first opening is formed in the first protection layer between the first patterned structures. The first opening penetrates the first protection layer and exposes a part of the substrate. A first etching process is performed after forming the first opening. A part of the substrate under the first patterned structures is removed by the first etching process for suspending at least a part of each of the first patterned structures above the substrate.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: October 18, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chuan-Chang Wu, Zhen Wu, Hsuan-Hsu Chen, Chun-Lung Chen
  • Publication number: 20210143267
    Abstract: A manufacturing method of a semiconductor device includes the following steps. First patterned structures are formed on a substrate. Each of the first patterned structures includes a first semiconductor pattern and a first bottom protection pattern disposed between the first semiconductor pattern and the substrate. A first protection layer is formed on the first patterned structures and the substrate. A part of the first protection layer is located between the first patterned structures. A first opening is formed in the first protection layer between the first patterned structures. The first opening penetrates the first protection layer and exposes a part of the substrate. A first etching process is performed after forming the first opening. A part of the substrate under the first patterned structures is removed by the first etching process for suspending at least a part of each of the first patterned structures above the substrate.
    Type: Application
    Filed: January 19, 2021
    Publication date: May 13, 2021
    Inventors: Chuan-Chang Wu, Zhen Wu, Hsuan-Hsu Chen, Chun-Lung Chen
  • Patent number: 10937893
    Abstract: A manufacturing method of a semiconductor device includes the following steps. First patterned structures are formed on a substrate. Each of the first patterned structures includes a first semiconductor pattern and a first bottom protection pattern disposed between the first semiconductor pattern and the substrate. A first protection layer is formed on the first patterned structures and the substrate. A part of the first protection layer is located between the first patterned structures. A first opening is formed in the first protection layer between the first patterned structures. The first opening penetrates the first protection layer and exposes a part of the substrate. A first etching process is performed after forming the first opening. A part of the substrate under the first patterned structures is removed by the first etching process for suspending at least a part of each of the first patterned structures above the substrate.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: March 2, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chuan-Chang Wu, Zhen Wu, Hsuan-Hsu Chen, Chun-Lung Chen
  • Publication number: 20210013325
    Abstract: A manufacturing method of a semiconductor device includes the following steps. First patterned structures are formed on a substrate. Each of the first patterned structures includes a first semiconductor pattern and a first bottom protection pattern disposed between the first semiconductor pattern and the substrate. A first protection layer is formed on the first patterned structures and the substrate. A part of the first protection layer is located between the first patterned structures. A first opening is formed in the first protection layer between the first patterned structures. The first opening penetrates the first protection layer and exposes a part of the substrate. A first etching process is performed after forming the first opening. A part of the substrate under the first patterned structures is removed by the first etching process for suspending at least a part of each of the first patterned structures above the substrate.
    Type: Application
    Filed: August 19, 2019
    Publication date: January 14, 2021
    Inventors: Chuan-Chang Wu, Zhen Wu, Hsuan-Hsu Chen, Chun-Lung Chen