Abstract: A display and an operating method of the display are provided. The display includes a display panel, a timing controller, and a plurality of source drivers. The source drivers are coupled to the timing controller and the display panel, and the source drivers are coupled to one another. The timing controller outputs a plurality of training packets to the source drivers. When the source drivers lock a clock of the timing controller according to the training packets, the timing controller outputs a plurality of color data packets and a plurality of control packets to the source drivers according to a lock signal. The source drivers respectively output pixel voltages to the display panel and determine output timings of the pixel voltages according to the clock of the timing controller and the control packets. The training packets and the color data packets are serially transmitted to the source drivers.

Abstract: A display and an operating method thereof are provided. The display includes a display panel, a timing controller, and a plurality of source drivers. The timing controller has a plurality of signal output terminals. The source drivers are coupled to the timing controller and the display panel. The timing controller outputs a plurality of training packets to the source drivers. When the source drivers lock a clock of the timing controller according to the training packets, the timing controller outputs a plurality of control packets and a plurality of color data packets to the source drivers. The source drivers respectively output a plurality of pixel voltages corresponding to the color data packets to the display panel according to the corresponding control packets. The training packets, the control packets, and the color data packets are serially transmitted to the source drivers via the signal output terminals.

Abstract: A source driver including a controller, a plurality of flip-flops, a plurality of shift registers and a plurality of driving channels is provided. The controller extracts control information from an image data stream. Each of the flip-flops respectively receives a corresponding control bit of the control information, and output the corresponding control bit. The shift registers correspond to the flip-flops one by one, and sequentially transmit an enable pulse. Each of the shift registers determines whether to output the enable pulse according to the control bit outputted by the corresponding flip-flop. The driving channels correspond to the shift registers one by one. Each of the driving channels switches an operation state into an enable mode or a disable mode according to the enable pulse outputted by the corresponding shift register.

Abstract: A source driver for driving at least one sub-pixel is disclosed, in which the source driver includes a gamma voltage generator and a digital to analog converter. The gamma voltage generator generates a plurality of gamma voltages, in which the gamma voltage generator includes a first gamma resistor string and an operation circuit. The first gamma resistor string includes a plurality of resistors electrically connected serially for dividing a first gamma reference voltage and a second gamma reference voltage into the gamma voltages. The operation circuit optionally adds increments to the gamma voltages according to a timing control signal, wherein the increments are the same when the gamma voltages are added. The digital to analog converter selecting one of the gamma voltages generated by the operation circuit as a driving voltage based on received digital pixel data.

Abstract: A source driver including a controller, a plurality of flip-flops, a plurality of shift registers and a plurality of driving channels is provided. The controller extracts control information from an image data stream. Each of the flip-flops respectively receives a corresponding control bit of the control information, and output the corresponding control bit. The shift registers correspond to the flip-flops one by one, and sequentially transmit an enable pulse. Each of the shift registers determines whether to output the enable pulse according to the control bit outputted by the corresponding flip-flop. The driving channels correspond to the shift registers one by one. Each of the driving channels switches an operation state into an enable mode or a disable mode according to the enable pulse outputted by the corresponding shift register.

Abstract: A source driver for driving at least one sub-pixel is disclosed, in which the source driver includes a gamma voltage generator and a digital to analog converter. The gamma voltage generator generates a plurality of gamma voltages, in which the gamma voltage generator includes a first gamma resistor string and an operation circuit. The first gamma resistor string includes a plurality of resistors electrically connected serially for dividing a first gamma reference voltage and a second gamma reference voltage into the gamma voltages. The operation circuit optionally adds increments to the gamma voltages according to a timing control signal, wherein the increments are the same when the gamma voltages are added. The digital to analog converter selecting one of the gamma voltages generated by the operation circuit as a driving voltage based on received digital pixel data.

Abstract: A source driver for driving a display panel and including a protection unit, a bias voltage generation unit and a buffer is provided. The protection unit detects a characteristic parameter of the source driver, and generates a switching signal according to a detection result. The bias voltage generation unit determines whether or not to provide a bias voltage according to the switching signal. The buffer is operated in the bias voltage so as to drive pixels in the display panel.

Abstract: The present invention discloses a source driver and a method for restraining noise output by a source driver during power on/off of a power supply. The source driver includes a data bus, a plurality of channels, a multiplexer and a plurality of output pads. The channels are connected to the output pads via the multiplexer. Each channel has a latch unit. Data is transmitted on the data bus and stored in the latch units. The source driver is powered by a first supply voltage from the power supply. The method comprises determining whether the first supply voltage is insufficient, and if yes, performing the following steps. First, set the data transmitted on the data bus to be a predetermined value. Then, keep the latch units turned on, thereby the data is sent out from the latch units. Then, keep the multiplexer turned on for outputting a driving voltage based on the data via the output pads.

Abstract: An electronic device has a first terminal and a second terminal and includes a control unit, a silicon controlled rectifier (SCR), and a switch unit. The control unit detects a positive pulse signal from the first terminal of the electronic device. When the positive pulse signal is detected by the control unit, the control unit generates a reset pulse after a predetermined time. The SCR has a first anode terminal, a second anode terminal, a first cathode terminal, and a second cathode terminal. The switch unit provides a plurality of transmission paths. When the switch unit receives the reset pulse, the switch unit cuts off the transmission paths, so that the first anode terminal, the second anode terminal, the first cathode terminal, and the second cathode terminal of the SCR are floating.

Abstract: A display and an operating method thereof are provided. The display includes a display panel, a timing controller, and a plurality of source drivers. The timing controller has a plurality of signal output terminals The source drivers are coupled to the timing controller and the display panel. The timing controller outputs a plurality of training packets to the source drivers. When the source drivers lock a clock of the timing controller according to the training packets, the timing controller outputs a plurality of control packets and a plurality of color data packets to the source drivers. The source drivers respectively output a plurality of pixel voltages corresponding to the color data packets to the display panel according to the corresponding control packets. The training packets, the control packets, and the color data packets are serially transmitted to the source drivers via the signal output terminals.

Abstract: A display and an operating method of the display are provided. The display includes a display panel, a timing controller, and a plurality of source drivers. The source drivers are coupled to the timing controller and the display panel, and the source drivers are coupled to one another. The timing controller outputs a plurality of training packets to the source drivers. When the source drivers lock a clock of the timing controller according to the training packets, the timing controller outputs a plurality of color data packets and a plurality of control packets to the source drivers according to a lock signal. The source drivers respectively output pixel voltages to the display panel and determine output timings of the pixel voltages according to the clock of the timing controller and the control packets. The training packets and the color data packets are serially transmitted to the source drivers.

Abstract: A circuit for resetting a display having at least one driver outputting a driving voltage through an output channel to a corresponding data line of a panel comprises a first switch and a second switch. The first switch is actuated by a control pulse to transfer a reset voltage to the data line of the panel. The second switch is actuated by the control pulse to electrically isolate the output channel of the driver from the data line of the panel, wherein the control pulse is asserted during transient periods resulting from power-on and power-off of the display.

Abstract: A source driver for driving a display panel and including a protection unit, a bias voltage generation unit and a buffer is provided. The protection unit detects a characteristic parameter of the source driver, and generates a switching signal according to a detection result. The bias voltage generation unit determines whether or not to provide a bias voltage according to the switching signal. The buffer is operated in the bias voltage so as to drive pixels in the display panel.

Abstract: The present invention discloses a source driver and a method for restraining noise output by a source driver during power on/off of a power supply. The source driver includes a multiplexer, at least two channels and at least two output pads. The channels are connected to the output pads via the multiplexer. The source driver is powered by a first supply voltage from the power supply. The two output pads are connected via a charge sharing switch. The method comprises the following steps. First, determine whether the first supply voltage is insufficient, and if yes, perform the following steps. Turn off the charge sharing switch. Then, disconnect the channels from the output pads by the multiplexer.

Abstract: An apparatus for testing a driving circuit for a display is disclosed. The apparatus includes a selecting circuit, a reference voltage generator and an analog-to-digital converter (ADC). The selecting circuit includes many input terminals and an output terminal. The input terminals are respectively coupled to many output pins of the driving circuit, while the selecting circuit is used for selecting one of the output pins to electrically connect the output terminal of the selecting circuit. The reference voltage generator is coupled to at least one of the output pins for generating a reference voltage. The ADC is coupled to the output terminal of the selecting circuit for outputting a digital value based on a difference between an output voltage outputted from the output terminal of the selecting circuit and the reference voltage produced by the reference voltage generator.

Abstract: A source driver includes a driver unit and a data analysis unit. The driver unit drives a display panel according to a video signal. The data analysis unit, which is coupled to the driver unit, analyzes gray level distribution of the video signal, and the data analysis unit enables or disables a charge sharing function of the driver unit according to an analysis result. As a result, the charge sharing function is enabled optionally during different charge sharing periods, and thus the power consumption in the source driver and the operation temperature of the source driver could be reduced as compared with the prior art.

Abstract: A source driver includes a gamma voltage generator and a digital to analog converter. The gamma voltage generator generates a plurality of gamma voltages, in which the gamma voltage generator includes a gamma resistor string, a second resistor, a plurality of first switches and a second switch. The first resistors are electrically connected serially for dividing a first gamma reference voltage and a second gamma reference voltage, in which the first resistors have first ends and second ends for providing gamma voltages. The second resistor has a first end electrically connected to the gamma resistor string and a second end receiving a third gamma reference voltage. The first switches are uniformly conducted to the first ends or the second ends of the first resistors according to a timing control signal for passing the gamma voltages.

Abstract: A source driver includes a gamma voltage generator, in which the gamma voltage generator includes a first gamma resistor string and a second gamma resistor string. The first gamma resistor string receives a first gamma reference voltage and generates a plurality of first gamma voltages. The second gamma resistor string receives a second gamma reference voltage and generates a plurality of second gamma voltages, in which the second gamma voltages have different voltage values from the first gamma voltages. The switch circuit selects the first gamma voltages or the second gamma voltages as output gamma voltages according to a timing control signal. The digital to analog converter selects one of the output gamma voltages as a driving voltage corresponding to a received digital pixel data for driving a first pixel region or a second pixel region of the sub-pixel.

Abstract: A display, which includes a display panel, a timing controller, and a source driver is provided. The timing controller analyzes gray level distribution of a video data to obtain an analysis result. The source driver is coupled between the display panel and the timing controller for driving the display panel to display a corresponding frame according to a video signal provided by the timing controller, and further the timing controller enables or disables a charge sharing function of the source driver in the display according to the analysis result. As a result, the charge sharing function is enabled optionally during different charge sharing periods, and thus the power consumption and the operation temperature of the source driver could be reduced as compared with the prior art.

Abstract: A display and an operating method thereof are provided. The display includes a display panel, a timing controller, and a plurality of source drivers. The timing controller has a plurality of signal output terminals. The source drivers are coupled to the timing controller and the display panel. The timing controller outputs a plurality of training packets to the source drivers. When the source drivers lock a clock of the timing controller according to the training packets, the timing controller outputs a plurality of control packets and a plurality of color data packets to the source drivers. The source drivers respectively output a plurality of pixel voltages corresponding to the color data packets to the display panel according to the corresponding control packets. The training packets, the control packets, and the color data packets are serially transmitted to the source drivers via the signal output terminals.