Abstract: An integrated circuit includes a signal pad, receiving an input signal during a normal mode, and receive an ESD signal during an ESD mode; an internal circuit, processing the input signal during the normal mode; a variable impedance circuit, comprising a first end coupled to the signal pad, a second end coupled to the internal circuit, wherein the variable impedance circuit provides a low or high impedance path between the signal pad and the internal circuit during the normal or ESD mode; and a switch circuit, comprising a first end coupled to a control end of the variable impedance circuit, a second end coupled to a reference voltage terminal, and a control end receiving a node voltage, wherein the switch circuit switches the control end of the variable impedance circuit to have a first specific voltage or be electrically floating during the normal or ESD mode.

Abstract: An amplifier device and a duplexer circuit are provided. The amplifier device includes a first differential amplifier circuit and a controller. The first differential amplifier circuit includes first and second radio frequency (RF) input terminals, first and second transistors, first and second adjustable capacitor circuits, and first and second RF output terminals. The controller adjusts capacitance values of the first adjustable capacitor circuit of the first differential amplifier circuit and the second adjustable capacitor circuit of the first differential amplifier circuit according to at least one of a characteristic related to a first RF input signal of the first differential amplifier circuit, a characteristic related to the second RF input signal of the first differential amplifier circuit, a matching deviation between the first transistor and the second transistor of the first differential amplifier circuit, and a characteristic of the amplifier device.

Abstract: An anti-parallel diode device includes a first semiconductor, a second semiconductor, a third semiconductor, and a third diode. The first semiconductor is of a first conductivity type, and the second semiconductor and the third semiconductor are of a second conductivity type. The second semiconductor is in contact with the first semiconductor, so that the first semiconductor and the second semiconductor form a first diode. The third semiconductor is in contact with the first semiconductor, so that the first semiconductor and the third semiconductor form a second diode. A first terminal of the third diode is electrically connected to the first semiconductor. The first terminal of the third diode is of the second conductivity type.

Abstract: An amplifier device and a duplexer circuit are provided. The amplifier device includes a first differential amplifier circuit and a controller. The first differential amplifier circuit includes first and second radio frequency (RF) input terminals, first and second transistors, first and second adjustable capacitor circuits, and first and second RF output terminals. The controller adjusts capacitance values of the first adjustable capacitor circuit of the first differential amplifier circuit and the second adjustable capacitor circuit of the first differential amplifier circuit according to at least one of a characteristic related to a first RF input signal of the first differential amplifier circuit, a characteristic related to the second RF input signal of the first differential amplifier circuit, a matching deviation between the first transistor and the second transistor of the first differential amplifier circuit, and a characteristic of the amplifier device.

Abstract: A signal switching apparatus includes a signal control switch, a switch circuit, a blocking capacitor and a surge current dissipating circuit. The signal control switch coupled between a first signal transceiving end and a second signal transceiving end is turned on or turned off according to a first control signal. The switch circuit having at least one first transistor is controlled by a second control signal to be turned on or off, and a first end of the switch circuit is coupled to the first signal transceiving end. The blocking capacitor is coupled between a second end of the switch circuit and a reference voltage terminal. The surge current dissipating circuit having at least one second transistor is coupled between the second end of the switch circuit and the reference voltage terminal. The second transistor is configured to dissipate a surge current and also turned off when operated normally.

Abstract: A bipolar transistor includes a collector layer, a base layer on the collector layer, and a first elongated emitter mesa on the base layer having a long side and a short side, wherein the long side is parallel with a first direction, and n separate first emitter-contact structures disposed along the first direction on the first elongated emitter mesa, where n is an integer greater than one.

Abstract: An integrated circuit includes a logic circuit and an amplifying circuit, in particular a low-noise amplifying circuit. The amplifying circuit includes at least one first transistor. The gate of the first transistor is coupled to a signal input terminal, the source region and the drain region of the first transistor are formed respectively in the well region of the first transistor on both sides of the gate, wherein the source region is coupled to a reference voltage terminal, and the sheet resistance of the source region is lower than that of the drain region. The logic circuit includes at least one second transistor. The sheet resistances of the source region and the drain region of the second transistor are equal.

Abstract: A switch apparatus is provided. The switch apparatus includes a signal control switch, a switch circuit, a blocking capacitor and a surge current dissipation circuit. The signal control switch and the switch circuit are respectively controlled by a first control signal and a second control signal to be turned on or off. The blocking capacitor is serially coupled between the switch circuit and a reference voltage end. The surge current dissipation circuit includes a Zener diode circuit or at least one diode circuit, and the at least one diode circuit has one or more diodes coupled in series. The one or more diodes coupled in series are coupled between two ends of the surge current dissipation circuit according to a first polarity direction.

Abstract: An integrated circuit includes a signal pad, receiving an input signal during a normal mode, and receive an ESD signal during an ESD mode; an internal circuit, processing the input signal during the normal mode; a variable impedance circuit, comprising a first end coupled to the signal pad, a second end coupled to the internal circuit, wherein the variable impedance circuit provides a low or high impedance path between the signal pad and the internal circuit during the normal or ESD mode; and a switch circuit, comprising a first end coupled to a control end of the variable impedance circuit, a second end coupled to a reference voltage terminal, and a control end receiving a node voltage, wherein the switch circuit switches the control end of the variable impedance circuit to have a first specific voltage or be electrically floating during the normal or ESD mode.

Abstract: An integrated circuit includes a logic circuit and an amplifying circuit, in particular a low-noise amplifying circuit. The amplifying circuit includes at least one first transistor. The gate of the first transistor is coupled to a signal input terminal, the source region and the drain region of the first transistor are formed respectively in the well region of the first transistor on both sides of the gate, wherein the source region is coupled to a reference voltage terminal, and the sheet resistance of the source region is lower than that of the drain region. The logic circuit includes at least one second transistor. The sheet resistances of the source region and the drain region of the second transistor are equal.

Abstract: A bipolar transistor includes a collector layer, a base layer on the collector layer, and a first elongated emitter mesa on the base layer having a long side and a short side, wherein the long side is parallel with a first direction, and n separate first emitter-contact structures disposed along the first direction on the first elongated emitter mesa, where n is an integer greater than one.

Abstract: An integrated circuit and a transmission circuit thereof are provided. The transmission circuit includes an input buffer and a voltage holding circuit. The voltage holding circuit has a first end coupled to the input end of the input buffer, and a second end coupled to a reference voltage end. The voltage holding circuit includes a switch and a diode apparatus coupled in series between the first end and the second end of the voltage holding circuit. The switch is configured to receive a mode signal, and is turned on or cut off according to the mode signal.

Abstract: An anti-parallel diode device includes a first semiconductor, a second semiconductor, a third semiconductor, and a third diode. The first semiconductor is of a first conductivity type, and the second semiconductor and the third semiconductor are of a second conductivity type. The second semiconductor is in contact with the first semiconductor, so that the first semiconductor and the second semiconductor form a first diode. The third semiconductor is in contact with the first semiconductor, so that the first semiconductor and the third semiconductor form a second diode. A first terminal of the third diode is electrically connected to the first semiconductor. The first terminal of the third diode is of the second conductivity type.

Abstract: A signal switching apparatus includes a signal control switch, a switch circuit, a blocking capacitor and a surge current dissipating circuit. The signal control switch coupled between a first signal transceiving end and a second signal transceiving end is turned on or turned off according to a first control signal. The switch circuit having at least one first transistor is controlled by a second control signal to be turned on or off, and a first end of the switch circuit is coupled to the first signal transceiving end. The blocking capacitor is coupled between a second end of the switch circuit and a reference voltage terminal. The surge current dissipating circuit having at least one second transistor is coupled between the second end of the switch circuit and the reference voltage terminal. The second transistor is configured to dissipate a surge current and also turned off when operated normally.

Abstract: A switch apparatus is provided. The switch apparatus includes a signal control switch, a switch circuit, a blocking capacitor and a surge current dissipation circuit. The signal control switch and the switch circuit are respectively controlled by a first control signal and a second control signal to be turned on or off. The blocking capacitor is serially coupled between the switch circuit and a reference voltage end. The surge current dissipation circuit includes a Zener diode circuit or at least one diode circuit, and the at least one diode circuit has one or more diodes coupled in series. The one or more diodes coupled in series are coupled between two ends of the surge current dissipation circuit according to a first polarity direction.

Abstract: An integrated circuit and a transmission circuit thereof are provided. The transmission circuit includes an input buffer and a voltage holding circuit. The voltage holding circuit has a first end coupled to the input end of the input buffer, and a second end coupled to a reference voltage end. The voltage holding circuit includes a switch and a diode apparatus coupled in series between the first end and the second end of the voltage holding circuit. The switch is configured to receive a mode signal, and is turned on or cut off according to the mode signal.

Abstract: An ESD protection circuit includes an input port, a resistor, a BJT, and a diode. The BJT has an emitter, a base, and a collector. The emitter of the BJT is coupled to the input port. The base of the BJT is coupled through the resistor to the input port. The diode has a first terminal and a second terminal. The first terminal of the diode is the collector of the BJT. The second terminal of the diode is coupled to a supply voltage.

Abstract: An ESD protection circuit includes an input port, a resistor, a BJT, and a diode. The BJT has an emitter, a base, and a collector. The emitter of the BJT is coupled to the input port. The base of the BJT is coupled through the resistor to the input port. The diode has a first terminal and a second terminal. The first terminal of the diode is the collector of the BJT. The second terminal of the diode is coupled to a supply voltage.