Abstract: A scheduling system includes a request masking circuit configured to receive a plurality of original requests for priority arbitration among a plurality of entries, the plurality of original requests include a last original request and a first original request following the last original request. A last mask associated with a last grant result for the last original request is received from a mask generator circuit. A first masked request is generated by applying the last mask to the first original request. A request selection circuit is configured to generate a first selected request based on the first original request and the first masked request. The mask generator circuit is configured to generate a first mask based on the first selected request. The first mask is associated with a first grant result for the first original request.

Abstract: Finding the first bit that is set in an n-bit input word includes generating n n-bit patterns from an n-bit input word. If the bit at one bit position of the input word has a logic 1 value, a corresponding pattern has a logic 1 value in a corresponding bit position and in each bit position left of the corresponding bit position, and a logic 0 value in each bit position right of the corresponding bit position. If the bit at the one bit position of the input word has a logic 0 value, the corresponding pattern has a logic 0 value in every bit position. The n patterns are combined into one merged n-bit pattern. An output n-bit pattern is generated from the merged n-bit pattern. The output pattern has a logic 1 value in one bit position that is the same as the rightmost bit position of the input word having a logic 1 value, and a logic 0 value in every other bit position.