Abstract: The present invention provides a transformed strain, comprising: a host cell; a first nucleotide sequence, located inside the host cell, the first nucleotide sequence encoding a PETase, which is derived from Ideonella; and a second nucleotide sequence, located inside the host cell, the second nucleotide sequence comprising a first chaperon nucleotide sequence or a second chaperon nucleotide sequence; wherein the first chaperon nucleotide sequence encodes a molecular chaperon protein (GroELS), and the second chaperon nucleotide sequence encodes a lipase secretion chaperone protein (LsC). The present invention also provides a method for degrading plastic, using said transformed strain for degrading a plastic having PET.

Abstract: A hybrid rail support system. The hybrid rail support system includes a wider width information handling system chassis; and, a hybrid rail support component extending from a front portion of the server rack to a rear portion of the server rack, the hybrid rail support component comprising: a static rail, the static rail being configured to mount to a side of a server rack; and, a sliding rail, the sliding rail being configured to move along the static rail from an inserted position to an extended position, the sliding rail being configured to mount to a rear portion of a wider width information handling system chassis, the sliding rail enabling the wider width information handling system chassis to extend from a rack to a rack service position.

Abstract: Provided is a recombinant microorganism including at least two genes for producing itaconic acid and its derived monomers, and the at least two genes are located on the same expression vector. The at least two genes include one encoding cis-aconitic acid decarboxylase and the other one encoding aconitase, and the genome of the recombinant microorganism includes a gene encoding the molecular chaperone protein GroELS. Also provided is a method for producing itaconic acid by using the microorganism.

Abstract: A capacitor structure including a substrate, a capacitor, a second dielectric layer, a first conductive layer, and a second conductive layer is provided. The capacitor includes first electrode layers, at least one second electrode layer, and a first dielectric layer. The first electrode layers and the at least one second electrode layer are alternately disposed on the substrate. The first dielectric layer is disposed between the first electrode layer and the second electrode layer. The second dielectric layer has first openings and at least one second opening. The first openings expose the first electrode layers. The second opening exposes the second electrode layer. The first conductive layer is electrically connected to the first electrode layers. The first conductive layer is a single conductive layer disposed on the second dielectric layer and extending into the first openings. The second conductive layer is electrically connected to the second electrode layer.

Abstract: Provided is a recombinant microorganism including at least two genes for producing itaconic acid and its derived monomers, and the at least two genes are located on the same expression vector. The at least two genes include one encoding cis-aconitic acid decarboxylase and the other one encoding aconitase, and the genome of the recombinant microorganism includes a gene encoding the molecular chaperone protein GroELS. Also provided is a method for producing itaconic acid by using the microorganism.

Abstract: A support platform is configured to support at least a portion of the weight of an associated semiconductor manufacturing tool, such as a furnace, when the associated semiconductor manufacturing tool is disposed on the support platform. The support platform comprises a base, a support plate disposed on the base and configured to move respective to the base, a brake plate arranged in fixed position respective to the base, and a damper secured to one of the support plate or the brake plate and frictionally engaging a track of the other of the support plate or the brake plate. The track includes a central track portion and inclined track portions extending away from the central track portion on respective first and opposite second sides of the central track portion. The inclined track portions are each inclined with respect to the central track portion.

Abstract: A support platform is configured to support at least a portion of the weight of an associated semiconductor manufacturing tool, such as a furnace, when the associated semiconductor manufacturing tool is disposed on the support platform. The support platform comprises a base, a support plate disposed on the base and configured to move respective to the base, a brake plate arranged in fixed position respective to the base, and a damper secured to one of the support plate or the brake plate and frictionally engaging a track of the other of the support plate or the brake plate. The track includes a central track portion and inclined track portions extending away from the central track portion on respective first and opposite second sides of the central track portion. The inclined track portions are each inclined with respect to the central track portion.

Abstract: A capacitor is made using a wafer, and includes structural elevation portions to allow an electrode layer in the capacitor to be extended along surface profiles of the structural elevation portions to thereby increase its extension length, so as to reduce capacitor area, simplify capacitor manufacturing process and reduce manufacturing cost.

Abstract: A capacitor structure including a substrate, a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, a third electrode, and a stress balance layer is provided. The substrate has trenches and a pillar portion located between two adjacent trenches. The first electrode is disposed on the substrate, on the pillar portion, and in the trenches. The first dielectric layer is disposed on the first electrode and in the trenches. The second electrode is disposed on the first dielectric layer and in the trenches. The second dielectric layer is disposed on the second electrode and in the trenches. The third electrode is disposed on the second dielectric layer and in the trenches. The third electrode has a groove, and the groove is located in the trench. The stress balance layer is disposed in the groove.

Abstract: A support platform is configured to support at least a portion of the weight of an associated semiconductor manufacturing tool, such as a furnace, when the associated semiconductor manufacturing tool is disposed on the support platform. The support platform comprises a base, a support plate disposed on the base and configured to move respective to the base, a brake plate arranged in fixed position respective to the base, and a damper secured to one of the support plate or the brake plate and frictionally engaging a track of the other of the support plate or the brake plate. The track includes a central track portion and inclined track portions extending away from the central track portion on respective first and opposite second sides of the central track portion. The inclined track portions are each inclined with respect to the central track portion.

Abstract: A capacitor structure including a substrate, a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, a third electrode, and a stress balance layer is provided. The substrate has trenches and a pillar portion located between two adjacent trenches. The first electrode is disposed on the substrate, on the pillar portion, and in the trenches. The first dielectric layer is disposed on the first electrode and in the trenches. The second electrode is disposed on the first dielectric layer and in the trenches. The second dielectric layer is disposed on the second electrode and in the trenches. The third electrode is disposed on the second dielectric layer and in the trenches. The third electrode has a groove, and the groove is located in the trench. The stress balance layer is disposed in the groove.

Abstract: A riser of an information handling system having an adjustable baffle that blocks air flowing through the riser from by-passing components of an expansion card, such as a PCIe card, installed in the riser. The baffle directs the flowing air across components of the expansion card to lower the operating temperature of the expansion card by convection. In some embodiments, part of the baffle is coupled to an angled slot of the riser body and another part of the baffle is coupled to a card holder so that movement of the card holder automatically adjusts the position of the baffle to direct otherwise by-passing air toward the components of the installed expansion card.

Abstract: An assembly that includes a planar surface, a plurality of first features disposed on the planar surface and a plurality of second features disposed on the planar surface. Each second feature is associated with one of the first features and a fan module coupled to one of the first features and the associated second feature.

Abstract: A capacitor is made using a wafer, and includes structural elevation portions to allow an electrode layer in the capacitor to be extended along surface profiles of the structural elevation portions to thereby increase its extension length, so as to reduce capacitor area, simplify capacitor manufacturing process and reduce manufacturing cost.

Abstract: A riser of an information handling system having an adjustable baffle that blocks air flowing through the riser from by-passing components of an expansion card, such as a PCIe card, installed in the riser. The baffle directs the flowing air across components of the expansion card to lower the operating temperature of the expansion card by convection. In some embodiments, part of the baffle is coupled to an angled slot of the riser body and another part of the baffle is coupled to a card holder so that movement of the card holder automatically adjusts the position of the baffle to direct otherwise by-passing air toward the components of the installed expansion card.

Abstract: A method for recording memory errors includes the following steps: upon detecting a current correctable error that occurred in a volatile memory device, determining whether a count value corresponding to the current correctable error exceeds a predetermined value; and when it is determined that the count value corresponding to the current correctable error thus detected does not exceed the predetermined value, sending update event information corresponding to the current correctable error to a BMC, in order for the BMC to record information of the current correctable error.

Abstract: A capacitor is made using a wafer, and includes structural elevation portions to allow an electrode layer in the capacitor to be extended along surface profiles of the structural elevation portions to thereby increase its extension length, so as to reduce capacitor area, simplify capacitor manufacturing process and reduce manufacturing cost.

Abstract: A venting grate includes a main portion, a first venting area, and a second venting area. The first venting area is defined by first, second, third, and fourth edges. Each of the first, second, third, and fourth edges extend from the main portion. The second venting area is defined by fifth, sixth, seventh, and eighth edges. Each of the fifth, sixth, seventh, and eighth edges extend from the main portion. The third edge and the fifth edge extend away from the main portion of the venting grate and angle together to form a pointed edge between the first and second venting areas.

Abstract: A method for recording memory errors includes the following steps: upon detecting a current correctable error that occurred in a volatile memory device, determining whether a count value corresponding to the current correctable error exceeds a predetermined value; and when it is determined that the count value corresponding to the current correctable error thus detected does not exceed the predetermined value, sending update event information corresponding to the current correctable error to a BMC, in order for the BMC to record information of the current correctable error.

Abstract: An assembly comprising a planar surface, a plurality of first features disposed on the planar surface, a plurality of second features disposed on the planar surface, each second feature associated with one of the first features and a fan module coupled to one of the first features and the associated second feature.