Abstract: An active matrix device or a flat panel display, includes a substrate, a plurality of scan lines and data lines, a plurality of pixels, an electrostatic discharge circuit, and a first electrostatic protection circuit, in which the scan lines, the data lines and the electrostatic discharge circuit are disposed on the substrate. The data lines are across the scan lines. The electrostatic discharge circuit is also across the scan lines and the data lines. The first electrostatic protection circuit is coupled to the electrostatic discharge circuit, but is neither coupled to the scan lines nor coupled to the data lines.

Abstract: An active matrix device or a flat panel display, includes a substrate, a scan line and a data line, a pixel, an electrostatic discharge ring, a first diode, a second diode, a third diode and a forth diode. The anodes of the first diode and the fourth diode are coupled to the scan line, and the cathodes of the first diode and the fourth diode are coupled to the electrostatic discharge ring. The anodes of the second diode and the third diode are coupled to the electrostatic discharge ring, and the cathodes of the second diode and the third diode are coupled to the scan line.

Abstract: An active matrix device includes a substrate, scan lines, data lines, pixels, electrostatic discharge ring, a circuit board and a electrostatic protection circuit. The scan lines and data lines are disposed on the substrate, in which the data lines cross the scan lines. The pixels are electrically coupled to the data lines and the scan lines. The electrostatic discharge ring is disposed on the substrate. The electrostatic protection circuit is coupled between the electrostatic discharge ring and the circuit board, in which the electrostatic protection circuit prevents the electrostatic current on the circuit board from entering the substrate.

Abstract: An E-ink display panel including a substrate, display pixels, dummy pixels, a display medium and a common electrode is provided. The display pixels are disposed on the substrate and arranged in a matrix for defining a display region. The dummy pixels are disposed on the substrate and adjacent to the display pixels. The display medium is disposed over the display pixels and the dummy pixels. The common electrode is disposed on the display medium. The display medium above the display pixels is driven by the bias voltage between the display pixel and the common electrode such that an image is displayed by the display medium, and display state of the display medium above the dummy pixels is not affected by the bias voltage between the dummy pixel and the common electrode. The dummy pixels are adapted for preventing the display pixels from being damaged directly due to an ESD.

Abstract: An active matrix device including an active region and an ESD protection circuit is provided. The active region includes scan lines and data lines. The ESD protection circuit includes a first power line, a second power line, a first diode and a second diode. The first diode is electrically connected between the scan line/data line and the first power line, and the second diode is electrically connected between the second power line and the scan line/data line. When a positive or negative ESD voltage is applied to the scan lines or the data lines, the ESD current is conducted to the first power line or the second power line through the first diodes or the second diodes, so as to protect the devices and circuits of the active matrix device from being damaged by the ESD zap.

Abstract: A multi-channel thin film transistor structure including a first conducting layer, an insulating layer, a semiconductor layer and a second conducting layer is provided. The first conducting layer formed on a substrate includes a gate electrode. The insulating layer covers the first conducting layer. The semiconductor layer formed on the insulating layer includes a plurality of semiconductor islands located above the gate electrode. The second conducting layer formed on the insulating layer and on the semiconductor layer includes a source electrode and a drain electrode. Each one of the semiconductor islands is coupled electrically with the source electrode at one end and coupled electrically with the drain electrode at the other end.

Abstract: A thin film transistor array substrate suitable for being applied in an electronic ink display device is provided. The thin film transistor array substrate includes a substrate, scan lines, data lines, thin film transistors, pixel electrodes and testing signal lines. The data lines and the scan lines are disposed and define a plurality of pixel regions on the substrate. Each thin film transistor is disposed in the respective pixel region and driven by the corresponding scan line and data line. In addition, each pixel electrode is disposed in respective pixel region and electrically connected to the thin film transistor corresponding thereto. Furthermore, the testing signal line connects to the scan lines and/or the data lines in series. The testing accuracy as well as the production yield of the electronic ink display device and the thin film transistor array substrate can be improved by the design of the aforementioned testing circuit.

Abstract: A thin film transistor array substrate and an electronic ink display device are provided. The thin film transistor includes a substrate, scan lines, data lines, thin film transistors, and pixel electrodes. The substrate has plural pixel regions, and the scan lines and the data lines are disposed on the substrate. Additionally, each pixel region has at least two thin film transistors therein, each thin film transistor only corresponds to one scan line and one data line, and each scan line and each data line is corresponded to at least one thin film transistor respectively. Furthermore, each pixel region has a pixel electrode therein, and the pixel electrode covers and is electrically connected to the thin film transistors in the same pixel region. The thin film transistor array substrate and the electronic ink display device can provide superior repairing functions to pixel defects for improving productive yield.

Abstract: An active-matrix display panel including a display area, a peripheral region and a fanout circuitry is provided. The peripheral region is connected with at least one side of the display area. The fanout circuitry is arranged on the peripheral region and is a multi-layered routing structure. By using the multi-layered routing structure aforementioned, the layout flexibility is improved significantly.