Abstract: A detergent container includes a reservoir including a top dispensing part, an intermediate corrugated part, and a bottom edge part. The reservoir is tapered upward. A middle of the dispensing part is provided with a reclosable opening. The reclosable opening is covered by a folding plate. The folding plate is formed with an edge of the reclosable opening. The folding plate includes a first part and a second part. The first part is formed with a column having a half-round section. The column includes a flat surface and an arc surface. The first part is provided with a first fold line between the arc surface and the edge of the reclosable opening. The second part is provided with a second fold line between the flat surface and the edge of the reclosable opening. An edge of the dispensing part is provided with a baffle having an arc section.

Abstract: A folding detergent container includes a reservoir including a dispensing part on a top, an intermediate folding part, and a bottom edge part. The reservoir is stepped and tapered from bottom to top. A middle of the dispensing part is provided with a reclosable opening. The reclosable opening is covered by a folding plate. A lever is formed with and projects upward from the folding plate. An edge of the dispensing part is provided with a baffle having an arc section. The folding part includes a plurality of folding lines and a plurality of folding sections. Thickness of the folding section is greater than that of the folding line so that the folding part is configured to axially fold. The folding sections are alternated with the folding lines, and the folding section is provided between the two adjacent folding lines. A protective film attached to the bottom edge part.

Abstract: Provided are a fan-out package structure and a manufacturing method thereof. The fan-out package structure provided in the embodiments of the present disclosure, and the fan-out package structure obtained by the manufacturing method provided in the embodiments of the present disclosure have an inter-chip fine interconnection line between functional surfaces of chips, so that fine interconnection pin pads of adjacent chips form electrical interconnection.

Abstract: A fan-out package structure and a fan-out package method are provided. The fan-out package structure includes: a chip, an inner substrate, a bonding patch layer, an encapsulation layer, an insulation support layer, an interconnection line structure, package pins, a first electrically conductive layer and a second electrically conductive layer.

Abstract: Provided are embedded three-dimensional fan-out package structure and method. In one example, the method includes: fabricating chip module based on a multi-faceted pin chip, bonding chip module and additional chip to temporary carrier; forming plastic packaging layer on side of temporary carrier; removing temporary carrier; forming redistribution layer on plastic packaging layer; and forming electrically conductive solder balls or bumps on side of protective dielectric layer in redistribution layer facing away from chip module and additional chip, wherein they pass through protective dielectric layer to be electrically connected to upper pins of electrically conductive wiring layer.

Abstract: The present invention discloses a signal receiving apparatus having phase compensation mechanism. A first and a second receiving path of a receiving circuit perform frequency down-conversion and analog-to-digital conversion on an input signal to generate a first and a second receiving signals. The first and the second receiving paths uses a RF training signal generated by a RF training signal generation circuit as the input signal when a phase compensation is performed, and use a data signal from an antenna circuit as the input signal when a beamforming signal receiving is performed. A phase difference calculation circuit of the receiving circuit performs cross-correlation operation on the first and the second receiving signals to generate a compensation signal according to a phase difference between the first and the second receiving paths.

Abstract: The invention provide an edge structure of a semiconductor wafer, which comprise a first substrate, an edge region and a device region are defined on that first substrate, a first material layer covers a first surface and a side surface of the edge region, and a second material layer covers the first material layer, the cross-sectional structure of the second material layer gradually decreases from the device region to the edge region.

Abstract: A FinFET LDMOS device includes a semiconductor substrate; juxtaposed first well and second well in the semiconductor substrate; semiconductor fins extending on the semiconductor substrate along a first direction, the semiconductor fins including a first fin portion in the first well and a second fin portion in the second well; an extra semiconductor body adjoining the first fin portion and the second fin portion and extending along a second direction; a source region on the first fin portion; a drain region on the second fin portion; a gate covering the semiconductor fin and extending along the second direction, wherein the gate partially overlaps the first fin portion and partially overlaps the second fin portion, and the extra semiconductor body is covered by the gate; and a single-diffusion break structure embedded in the second fin portion and between the gate and drain region.

Abstract: A substrate bonding method includes: providing a first and a second substrate; forming, on the first substrate, a first metal micro-bump array including first metal pillar(s) formed on the first substrate and first metal nanowires formed thereon and spaced apart from each other; forming, on the second substrate, a second metal micro-bump array including second metal pillar(s) formed on the second substrate and second metal nanowires formed thereon and spaced apart from each other; pressing the first substrate onto the second substrate, such that the first and second metal micro-bump arrays are positioned and staggered with each other, forming a physically interwoven interlocking structure between the first and second metal nanowires; applying a filling material between the first and second substrates; curing the filling material to form a bonding cavity; and then performing confined heating reflux on the first and second metal micro-bump arrays in the bonding cavity.

Abstract: A method of switching an operation mode of a first multi-link device includes the first multi-link device establishing a plurality of links to a second multi-link device, and the first multi-link device determining according to a channel condition whether to receive a plurality of streams via the plurality of links or via one of the plurality of links.

Abstract: The present disclosure relates to a poly(aryl piperidinium) copolymer ionomer which does not have aryl ether bonds in the polymer skeleton and has branch-containing piperidinium groups introduced into repeating units, having excellent chemical stability, excellent mechanical properties while having a high molecular weight, and a low swelling ratio and high dimensional stability and ionic conductivity, and a limited phenyl adsorption effect. In addition, an anion-exchange membrane prepared from the branch-containing poly(aryl piperidinium) copolymer ionomer is operable under low-humidity conditions and is excellent in water management ability, and thus can be applied to membranes and binders for alkaline fuel cells, water electrolysis devices, carbon dioxide reduction, vanadium redox flow batteries, metal-air batteries, etc.

Abstract: A filter radio frequency module packaging structure and a method for manufacturing same is disclosed. A first filter chip of the filter radio frequency module packaging structure comprises a chip main body and a wall structure. The wall structure, the functional surface, and a substrate together define a closed cavity, or the wall structure and the functional surface together define a closed cavity. An encapsulation material wraps the first filter chip.

Abstract: The present disclosure relates to a technology for synthesizing a poly(spirobisindane-aryl piperidinium) copolymer containing a spirobisindane group in a repeating unit with no aryl ether bond in a polymer backbone, and preparing an anion-exchange membrane therefrom. A novel poly(spirobisindane-aryl piperidinium) copolymer ionomer according to the present disclosure has excellent chemical stability and mechanical properties, high ionic conductivity, improved gas permeability, and reduced material transfer resistance. In addition, an anion-exchange membrane and a composite membrane prepared from the poly(spirobisindane-aryl piperidinium) copolymer ionomer have excellent chemical stability, mechanical properties, durability and water management ability and, thus, can be applied to membranes and binders for alkaline fuel cells, water electrolysis devices, carbon dioxide reduction, metal-air batteries, etc.

Abstract: The present disclosure relates to the synthesis of a poly (alkyl-co-aryl piperidinium) polymer, which has no aryl-ether bond in the polymer backbone, contains an aliphatic chain in a repeating unit and has a piperidinium group introduced therein, and to the preparation of an anion exchange membrane and a composite membrane using the same. The anion exchange membrane and the composite membrane according to the present disclosure have superior alkaline stability and mechanical properties and very high ion conductivity. Furthermore, they reduce the phenyl adsorption effect of an electrode catalyst and exhibit high water permeability and power density as well as excellent durability. Thus, they can be applied to membranes and binders for alkaline fuel cells or water electrolysis.

Abstract: Provided are a chip interconnection package structure and method, including: forming a sacrificial pattern layer on a support structure; forming an interconnection winding pattern layer on the sacrificial pattern layer, wherein the interconnection winding pattern layer is corresponding to a sacrificial pattern of the sacrificial pattern layer in position; forming a first insulating layer on the interconnection winding pattern layer; forming a plurality of chips arranged at intervals on the first insulating layer, wherein the plurality of chips are respectively corresponding to the interconnection winding pattern of the interconnection winding pattern layer in position; and removing the support structure, and forming, on one side of the sacrificial pattern layer, a first interconnection hole penetrating through the sacrificial pattern, the interconnection winding pattern and the first insulating layer, and making the first interconnection hole aligned and communicated with a first interconnection pin of the ch

Abstract: A capacitor structure comprises a substrate having a first side and a second side opposite to the first side; a plurality of first trenches formed on the first side of the substrate; a plurality of second trenches formed on the second side of the substrate; a first capacitor extending along the first side and into the first trenches; and a second capacitor extending along the second side and into the second trenches, wherein a first depth of each of the first trenches or a second depth of each of the second trenches is greater than half of a thickness of the substrate.

Abstract: The present disclosure relates to a technology of synthesizing an aromatic polyfluorene-based copolymer which has a cross-linked structure, does not have an aryl ether bond in a polymer backbone and has a piperidinium group introduced in a repeating unit, and applying an anion exchange membrane prepared therefrom to an alkaline fuel cell, water electrolysis, carbon dioxide reduction, a metal-air battery, etc. According to the present disclosure, an anion exchange membrane having a cross-linked structure has superior thermal and chemical stability and mechanical properties as well as high water-holding capacity, ionic conductivity and durability, and exhibits a superior dispersed phase.

Abstract: Disclosed is a method of manufacturing a chiplet-fine-interconnection-package structure, comprising: mounting at least two chips on a first side surface of a substrate and preparing a temporary bonding layer on the chips, preparing a plastic package layer on a second side surface of the substrate, wherein the substrate is prepared with microvias to allow plastic package materials to flow from the microvias into an area between the first side surface of the substrate and the temporary bonding layer to prepare the plastic package layer; releasing the temporary bonding layer, and bonding a silicon bridge structure on the first pin-arrays of the two adjacent chips. The solution provided by the present invention makes it unnecessary to remove the substrate in the subsequent process and to perform grinding and thinning process on the corresponding position of the plastic package layer, thus simplifying the packaging process steps and reducing the packaging cost.

Abstract: A wireless device includes a time-sensitive queue, an access category queue, a controller, and a transmitter. The access category queue is associated with an access category and a link. The controller is coupled to the access category queue, and is used to acquire a transmission opportunity according to a set of contention parameters of the access category. The transmitter is coupled to the controller and the time-sensitive queue, and is used to when a transmission opportunity is acquired, if the time-sensitive queue contains data, generate a data frame according to the data in the time-sensitive queue, and transmit the data to another wireless device via a link.

Abstract: A fan-out package structure and a fabricating method therefor are provided. The structure includes an encapsulation layer; an antenna RF module assembly and electronic component(s) embedded in the encapsulation layer; a first rewiring layer on a surface of a first side of the encapsulation layer, electrically connected to at least part of the pins of the assembly and to at least part of the pins of the electronic component(s); a second rewiring layer on a surface of a second side of the encapsulation layer, electrically connected to the encapsulation layer-interconnection conductive pillars and to the conductive solder balls/bumps; and conductive solder balls/bumps on a side of the second rewiring layer away from the encapsulation layer. The assembly includes a RF substrate, and an antenna array and RF device(s) arranged thereon. The assembly is embedded in the first side. Encapsulation-layer interconnection conductive pillars are formed in the encapsulation layer.