Patents by Inventor Chuan Liao

Chuan Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12248576
    Abstract: Embodiments of this application provide a face recognition method and apparatus, including: obtaining TOF data; processing the TOF data into a TOF image in a TEE; and performing face recognition by using the TOF image, to obtain a recognition result. Because the TOF data is used for face recognition, higher security is achieved. Implementation in the TEE can further improve the security.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: March 11, 2025
    Assignee: HONOR DEVICE CO., LTD.
    Inventors: Jiangfeng Yuan, Zhichao Li, Jianming Lv, Junwei Zhou, Yichao Zhang, Xiaogang Feng, Kun Ma, Chuan Liao
  • Patent number: 12147537
    Abstract: A malware family identification engine constructs a graph data structure of direct relationships between malware instances and malware families, direct relationships between malware instances and detected tags, and indirect relationships between detected tags and malware families. The engine builds a dictionary data structure comprising detected tag entries linking each detected tag to one or more malware family nodes based on the graph data structure. The engine identifies significant indirect entities (SIEs) within the detected tag entries of the dictionary data structure and selects a SIE with a highest number of out-going links (OGLs) as a root node in a family tree data structure, recursively connects SIEs with a number of OGLs less than the highest number of OGLs to the root node in the family tree data structure, and converts each SIE name in the family tree data structure to a chained family entity name in the family tree data structure.
    Type: Grant
    Filed: December 12, 2023
    Date of Patent: November 19, 2024
    Assignee: Business Machines Corporation
    Inventors: Yu-Siang Chen, Ci-Hao Wu, Ying-Chen Yu, Pao-Chuan Liao, June-Ray Lin
  • Publication number: 20240379845
    Abstract: A medium voltage transistor of a level shifter circuit may include a p-well region in a substrate. Moreover, the medium voltage transistor may include an n-type lightly-doped source/drain (NLDD) region in which an N+ source/drain region of the medium voltage transistor is included. The light doping in the NLDD region enables a threshold voltage (Vi) to be reduced while enabling medium voltage operation at the N+ source/drain region. To reduce the amount of current leakage in the medium voltage transistor due to the light doping in the NLDD region, a buffer layer may be included over and/or on a portion of the NLDD region under a gate structure of the medium voltage transistor. The NLDD region and the thermal region of the medium voltage transistor enables the threshold voltage of the medium voltage transistor while maintaining the same current leakage performance or reducing current leakage in the medium voltage transistor.
    Type: Application
    Filed: May 11, 2023
    Publication date: November 14, 2024
    Inventors: Chen-Liang CHU, Hsin-Chih CHIANG, Ruey-Hsin LIU, Ta-Yuan KUNG, Ta-Chuan LIAO, Chih-Wen YAO, Ming-Ta LEI
  • Publication number: 20240379791
    Abstract: A semiconductor structure includes semiconductor structure includes a metal gate structure, a plurality of dielectric pillars disposed in the metal gate structure, a source/drain structure disposed at tow side of the metal gate structure, and at least a first connecting structure disposed over one of the dielectric pillars and coupled to the metal gate structure. The first connecting structure overlaps the one of the dielectric pillars entirely from a top view. An area of the first connecting structure is greater than an area of the one of the dielectric pillars from the top view.
    Type: Application
    Filed: May 10, 2023
    Publication date: November 14, 2024
    Inventors: TA-CHUAN LIAO, CHEN-LIANG CHU, HSIN-CHIH CHIANG, MING-TA LEI, TA-YUAN KUNG
  • Patent number: 12132348
    Abstract: A dual power switching system includes a first STS, a second STS, an inductive device, and a controller. The first STS is electrically coupled to a main power source, and the second STS is electrically coupled to a backup power source. When detecting that the main power source is abnormal, the controller detects a residual magnetic flux of the inductive device and calculates a magnetic flux difference between the predicted magnetic flux and the residual magnetic flux. When determining that an absolute value of the magnetic flux difference is less than or equal to a magnetic flux deviation value, the controller determines whether the output power meets a forced commutation condition. When determining that the output power meets the forced commutation condition, the controller turns on the second STS so that the first STS is forcibly turned off by the backup power source through the second STS.
    Type: Grant
    Filed: February 3, 2023
    Date of Patent: October 29, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Jen-Chuan Liao, Chien-Chih Chan, Jia-Cheng Sie
  • Patent number: 12114547
    Abstract: Provided is a display panel, including a substrate, multiple pixel circuits, an insulating layer, multiple first electrodes, a first isolation structure, and a second isolation structure. The pixel circuits are located on the substrate. The insulating layer is located on the pixel circuits and has multiple through holes. The first electrodes are located on the insulating layer and are respectively electrically connected to the pixel circuits through the through holes. The first isolation structure is located on the insulating layer and overlaps the through holes. The second isolation structure includes multiple separating parts and multiple cover parts. The separating parts and the first isolation structure at least partially overlap, and the cover parts respectively overlap the through holes and the first isolation structure.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: October 8, 2024
    Assignee: Au Optronics Corporation
    Inventors: Kuo-Jui Chang, Wen-Tai Chen, Chi-Sheng Chiang, Yu-Chuan Liao, Chien-Sen Weng, Ming-Wei Sun
  • Publication number: 20240308101
    Abstract: A dust coupler adapted to different dust outlet tubes has a collecting pipe connector and an elastic sheathing element. The collecting pipe connector has a first end and a second end being opposite to each other. The first end is configured to be inserted into a collecting pipe of a dust collection system for woodworking. The elastic sheathing element is connected to the second end of the collecting pipe connector, has a mouth, and is configured to be elastically sheathed onto a dust outlet tube of a woodworking machine. A woodworker first mounts the dust coupler on the collecting pipe, and the collecting pipe can be combined with any one of different dust outlet tubes of different woodworking machines having different sizes via the dust coupler. The dust coupler allows the collecting pipe to be quickly combined with or detached from the dust outlet tube.
    Type: Application
    Filed: March 16, 2023
    Publication date: September 19, 2024
    Inventor: Hui-Chuan LIAO
  • Patent number: 12055231
    Abstract: A blast gate has a branch dust connector, a main duct connector, and a gate. The branch duct connector has a first tubular portion. The main duct connector is stably connected with the branch duct connector and has a second tubular portion, an inside surface, and a leak-proof protrusion. The inside surface faces the branch duct connector, and the leak-proof protrusion protrudes from the inside surface of the main duct connector and has a protrusion opening communicating with an interior of the second tubular portion. The gate is configured to slide in contact with the leak-proof protrusion to make an interior of the first tubular portion and the protrusion opening isolated from or communicate with each other. The blast gate reduces possibility of formation of gaps between the gate and the main duct connector and thus reduces possibility of air loss.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: August 6, 2024
    Inventor: Hui-Chuan Liao
  • Publication number: 20240234535
    Abstract: A thin film transistor includes a substrate, a semiconductor layer, a gate insulating layer, a gate, a source and a drain. The semiconductor layer is located above the substrate. The gate insulating layer is located above the semiconductor layer. The gate is located above the gate insulating layer and overlapping with the semiconductor layer. The gate includes a first portion, a second portion and a third portion. The first portion is extending along the surface of the gate insulating layer and directly in contact with the gate insulating layer. The second portion is separated from the gate insulating layer. Taking the surface of the gate insulating layer as a reference, the top surface of the second portion is higher than the top surface of the first portion. The third portion connects the first portion to the second portion. The source and the drain are electrically connected to the semiconductor layer.
    Type: Application
    Filed: December 1, 2022
    Publication date: July 11, 2024
    Applicant: AUO Corporation
    Inventors: Kuo-Jui Chang, Wen-Tai Chen, Chi-Sheng Chiang, Yu-Chuan Liao, Chien-Sen Weng, Ming-Wei Sun
  • Publication number: 20240232359
    Abstract: Embodiments of this application provide a face recognition method and apparatus, including: obtaining TOF data; processing the TOF data into a TOF image in a TEE; and performing face recognition by using the TOF image, to obtain a recognition result. Because the TOF data is used for face recognition, higher security is achieved. Implementation in the TEE can further improve the security.
    Type: Application
    Filed: May 10, 2022
    Publication date: July 11, 2024
    Inventors: Jiangfeng Yuan, Zhichao Li, Jianming Lv, Junwei Zhou, Yichao Zhang, Xiaogang Feng, Kun Ma, Chuan Liao
  • Publication number: 20240190034
    Abstract: An adjustable flip stop has a body, a fixing component, and a flip arm. The fixing component has a bolt and a nut. The bolt is mounted through a fixing hole of the body and has a bolt head contained in an interior of a T-track, and the nut is threaded with the bolt to locate the body between the bolt head and the nut. The flip arm has a connecting element, an arm body, and an adjusting element. The connecting element is pivotally connected to the body, and the arm body has a longitudinal direction. The adjusting element is combined with the connecting element and is capable of being combined at different positions of the arm body in the longitudinal direction to make the arm body and the connecting element fixed with respect to each other. The adjustable flip stop is applicable with fences of different heights.
    Type: Application
    Filed: December 12, 2022
    Publication date: June 13, 2024
    Inventors: Hui-Chuan LIAO, Chun-Ti Wang
  • Publication number: 20240190033
    Abstract: The flip stop has a body, a fixing component, and a flip arm. The body has a nut side, a track side opposite to the nut side, and an abutting portion disposed near the track side and tapering toward the track side. The fixing component has a bolt and a nut. The bolt is located through the body and has a bolt head located near the track side and allowing the flip stop to move along a T-track. The nut is threaded with the bolt to locate the body between the nut and the bolt head and is located near the nut side of the body. The flip arm is pivotally connected to the body. When the body and a T-track are fixed with respect to each other, the body is in line contact with the T-track, which leads to more stable and accurate positioning.
    Type: Application
    Filed: December 12, 2022
    Publication date: June 13, 2024
    Inventor: Hui-Chuan LIAO
  • Publication number: 20240183450
    Abstract: A blast gate has a branch dust connector, a main duct connector, and a gate. The branch duct connector has a first tubular portion. The main duct connector is stably connected with the branch duct connector and has a second tubular portion, an inside surface, and a leak-proof protrusion. The inside surface faces the branch duct connector, and the leak-proof protrusion protrudes from the inside surface of the main duct connector and has a protrusion opening communicating with an interior of the second tubular portion. The gate is configured to slide in contact with the leak-proof protrusion to make an interior of the first tubular portion and the protrusion opening isolated from or communicate with each other. The blast gate reduces possibility of formation of gaps between the gate and the main duct connector and thus reduces possibility of air loss.
    Type: Application
    Filed: December 5, 2022
    Publication date: June 6, 2024
    Inventor: HUI-CHUAN LIAO
  • Publication number: 20240176880
    Abstract: A malware family identification engine constructs a graph data structure of direct relationships between malware instances and malware families, direct relationships between malware instances and detected tags, and indirect relationships between detected tags and malware families. The engine builds a dictionary data structure comprising detected tag entries linking each detected tag to one or more malware family nodes based on the graph data structure. The engine identifies significant indirect entities (SIEs) within the detected tag entries of the dictionary data structure and selects a SIE with a highest number of out-going links (OGLs) as a root node in a family tree data structure, recursively connects SIEs with a number of OGLs less than the highest number of OGLs to the root node in the family tree data structure, and converts each SIE name in the family tree data structure to a chained family entity name in the family tree data structure.
    Type: Application
    Filed: December 12, 2023
    Publication date: May 30, 2024
    Inventors: Yu-Siang Chen, Ci-Hao Wu, Ying-Chen Yu, Pao-Chuan Liao, June-Ray Lin
  • Publication number: 20240136420
    Abstract: A thin film transistor includes a substrate, a semiconductor layer, a gate insulating layer, a gate, a source and a drain. The semiconductor layer is located above the substrate. The gate insulating layer is located above the semiconductor layer. The gate is located above the gate insulating layer and overlapping with the semiconductor layer. The gate includes a first portion, a second portion and a third portion. The first portion is extending along the surface of the gate insulating layer and directly in contact with the gate insulating layer. The second portion is separated from the gate insulating layer. Taking the surface of the gate insulating layer as a reference, the top surface of the second portion is higher than the top surface of the first portion. The third portion connects the first portion to the second portion. The source and the drain are electrically connected to the semiconductor layer.
    Type: Application
    Filed: December 1, 2022
    Publication date: April 25, 2024
    Applicant: AUO Corporation
    Inventors: Kuo-Jui Chang, Wen-Tai Chen, Chi-Sheng Chiang, Yu-Chuan Liao, Chien-Sen Weng, Ming-Wei Sun
  • Publication number: 20240063656
    Abstract: A dual power switching system includes a first STS, a second STS, an inductive device, and a controller. The first STS is electrically coupled to a main power source, and the second STS is electrically coupled to a backup power source. When detecting that the main power source is abnormal, the controller detects a residual magnetic flux of the inductive device and calculates a magnetic flux difference between the predicted magnetic flux and the residual magnetic flux. When determining that an absolute value of the magnetic flux difference is less than or equal to a magnetic flux deviation value, the controller determines whether the output power meets a forced commutation condition. When determining that the output power meets the forced commutation condition, the controller turns on the second STS so that the first STS is forcibly turned off by the backup power source through the second STS.
    Type: Application
    Filed: February 3, 2023
    Publication date: February 22, 2024
    Inventors: Jen-Chuan LIAO, Chien-Chih CHAN, Jia-Cheng SIE
  • Patent number: 11899791
    Abstract: A malware family identification engine constructs a graph data structure of direct relationships between malware instances and malware families, direct relationships between malware instances and detected tags, and indirect relationships between detected tags and malware families. The engine builds a dictionary data structure comprising detected tag entries linking each detected tag to one or more malware family nodes based on the graph data structure. The engine identifies significant indirect entities (SIEs) within the detected tag entries of the dictionary data structure and selects a SIE with a highest number of out-going links (OGLs) as a root node in a family tree data structure, recursively connects SIEs with a number of OGLs less than the highest number of OGLs to the root node in the family tree data structure, and converts each SIE name in the family tree data structure to a chained family entity name in the family tree data structure.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: February 13, 2024
    Assignee: International Business Machines Corporation
    Inventors: Yu-Siang Chen, Ci-Hao Wu, Ying-Chen Yu, Pao-Chuan Liao, June-Ray Lin
  • Publication number: 20240024966
    Abstract: A pocket hole jig is provided, including a body with a first end having at least one drill entry port in communication with an internal drilling chamber, and a second, opposite end having a chip flute in communication with the drilling chamber; a distance adjustment base configured for contact with a workpiece and is configured so that said body is linearly slidable relative to said base for adjusting drill depth and drilling position of the workpiece; and a dust collector fitting removably attachable to, and in communication with the chip flute, at least one of the dust collector fitting and the chip flute being configured for accommodating a clamp for securing the jig to the workpiece.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 25, 2024
    Inventor: Hui Chuan Liao
  • Patent number: 11828722
    Abstract: A biological device includes a substrate, a gate electrode, and a sensing well. The substrate includes a source region, a drain region, a channel region, a body region, and a sensing region. The channel region is disposed between the source region and the drain region. The sensing region is at least disposed between the channel region and the body region. The gate electrode is at least disposed on or above the channel region of the substrate. The sensing well is at least disposed adjacent to the sensing region.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: November 28, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ta-Chuan Liao, Chien-Kuo Yang, Yi-Shao Liu, Tung-Tsun Chen, Chan-Ching Lin, Jui-Cheng Huang, Felix Ying-Kit Tsui, Jing-Hwang Yang
  • Patent number: D1010405
    Type: Grant
    Filed: February 23, 2020
    Date of Patent: January 9, 2024
    Inventor: Hui-Chuan Liao