Patents by Inventor Chuan-Yu Luo

Chuan-Yu Luo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8987704
    Abstract: A semiconductor light emitting structure including an n-type semiconductor layer, a p-type semiconductor layer and an active layer is provided. The active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer is a multi-quantum well structure consisting of well layers and barrier layers interlaced and stacked to each other. The well layers near the n-type semiconductor layer at least include a first well layer having a first thickness, and the well layers near the p-type semiconductor layer at least include a second well layer having a second thickness smaller than the first thickness, so that the ability to restrict electrons within the area of the active layer near the n-type semiconductor layer is increased, and the conversion efficiency of the active layer is enhanced. There is a differential ?d1 between the first thickness and the second thickness, wherein 0 nm<?d1?10 nm.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 24, 2015
    Assignee: Lextar Electronics Corporation
    Inventor: Chuan-Yu Luo
  • Publication number: 20130334493
    Abstract: A semiconductor light emitting structure including an n-type semiconductor layer, a p-type semiconductor layer and an active layer is provided. The active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer is a multi-quantum well structure consisting of well layers and barrier layers interlaced and stacked to each other. The well layers near the n-type semiconductor layer at least include a first well layer having a first thickness, and the well layers near the p-type semiconductor layer at least include a second well layer having a second thickness smaller than the first thickness, so that the ability to restrict electrons within the area of the active layer near the n-type semiconductor layer is increased, and the conversion efficiency of the active layer is enhanced. There is a differential ?d1 between the first thickness and the second thickness, wherein 0 nm<?d1?10 nm.
    Type: Application
    Filed: March 15, 2013
    Publication date: December 19, 2013
    Applicant: LEXTAR ELECTRONICS CORPORATION
    Inventor: Chuan-Yu Luo