Patents by Inventor Chuang-Cheng YANG

Chuang-Cheng YANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190066622
    Abstract: A multiplexer applied to a display device includes: a plurality of switching units, electrically coupled to a data driver and a plurality of pixel units, where the switching units are adapted to receive a plurality of input display data signals output by the data driver, and the switching units output a plurality of output display data signals to the electrically coupled pixel units, where each of the switching units includes a plurality of switch units, configuration locations of the switch units in each of the switching units are the same as, and some of the switch units configured at a same configuration location in the different switching units are electrically coupled to different control signal lines and have different wiring lengths, where the wiring lengths are distances between the switch units and the control signal lines.
    Type: Application
    Filed: August 24, 2018
    Publication date: February 28, 2019
    Inventors: Yi-Cheng LIN, Ming-Hsien Lee, Kai-Wei Hong, Chun-Da Tu, Chuang-Cheng Yang, Chun-Feng Lin
  • Publication number: 20190043412
    Abstract: Provided is a gate driving circuit, coupled to a pixel array having multiple gate lines. The gate driving circuit includes multiple shift registers and multiple pull-up transistor, coupled to the pixel array and separately located on two opposite sides of the pixel array. Shift registers located on a same side are sequentially coupled to each other. An nth (n is a positive integer) pull-up transistor includes: a control end, coupled to a control end of a driving transistor of an (n?1)th shift register located on a same side as the nth pull-up transistor; a first end, used to receive a clock signal, where the clock signal is further input to an nth shift register of the shift registers located on an opposite side of the nth pull-up transistor; and a second end, coupled to an nth gate line of the pixel array and used to drive the nth gate line.
    Type: Application
    Filed: January 8, 2018
    Publication date: February 7, 2019
    Inventors: Chuang-Cheng YANG, Chun-Feng LIN, Ming-Hsien LEE, Kai-Wei HONG, Chun-Da TU, Yi-Cheng LIN
  • Patent number: 10152913
    Abstract: An anti-interference display panel includes a source driving chip, a switching signal line, a multiplexer, and an anti-interference signal line. The source driving chip is configured to generate a data signal. The switching signal line is configured to transmit a switching signal. The multiplexer is configured to receive the data signal and the switching signal, and is configured to output the data signal according to the switching signal. The anti-interference signal line is configured to transmit an anti-interference signal. An equivalent resistor and an equivalent capacitor are formed on the anti-interference signal line, and resistance of the equivalent resistor is approximate to resistance of a load resistor coupled to the switching signal line, and capacitance of the equivalent capacitor is approximate to capacitance of a load capacitor coupled to the switching signal line.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: December 11, 2018
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Yi-Cheng Lin, Ming-Hsien Lee, Kai-Wei Hong, Chun-Da Tu, Chuang-Cheng Yang, Chun-Feng Lin
  • Publication number: 20180315389
    Abstract: The present embodiment of the invention provides a gate driving circuit and a display apparatus using the gate driving circuit. The gate driving circuit has a plurality of shift registers, and each shift register includes a first output unit, a first pull-down unit, a second output unit, a second pull-down unit, a voltage coupling unit, and a voltage boosting unit. The first output unit is coupled to a node and a first output end. The second output unit is coupled to the node and a second output end. The first pull-down unit is coupled to the first output end and a reference potential. The second pull-down unit is coupled to the second output end and the reference potential. The voltage coupling unit is coupled between the node and the second output end. The voltage boosting unit is coupled to a preset potential, the first output end, and a node and a gate high potential of a shift register at a previous stage.
    Type: Application
    Filed: April 16, 2018
    Publication date: November 1, 2018
    Inventors: Kai-Wei HONG, Chun-Da TU, Ming-Hsien LEE, Chuang-Cheng YANG, Yi-Cheng LIN, Chun-Feng LIN
  • Patent number: 10019956
    Abstract: A shift register including a voltage set unit, a driver unit, a control unit, a first transistor, a second transistor, a third transistor and a fourth transistor is provided. The voltage set unit provides a terminal voltage. The driver unit provides a main gate signal according to the terminal voltage and a clock signal. The control unit provides a control signal. The first transistor receives the terminal voltage, a level reference voltage and the control signal. The second transistor is coupled to the first transistor and receives a low voltage and the control signal. The third transistor receives the terminal voltage, a level reference voltage and a gate reference signal. The fourth transistor is coupled to the third transistor and receives the low voltage and the gate reference signal.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: July 10, 2018
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chun-Da Tu, Yung-Chih Chen, Cheng-Han Huang, Kai-Wei Hong, Hsiang-Sheng Chang, Chuang-Cheng Yang
  • Publication number: 20170124971
    Abstract: A shift register including a voltage set unit, a driver unit, a control unit, a first transistor, a second transistor, a third transistor and a fourth transistor is provided. The voltage set unit provides a terminal voltage. The driver unit provides a main gate signal according to the terminal voltage and a clock signal. The control unit provides a control signal. The first transistor receives the terminal voltage, a level reference voltage and the control signal. The second transistor is coupled to the first transistor and receives a low voltage and the control signal. The third transistor receives the terminal voltage, a level reference voltage and a gate reference signal. The fourth transistor is coupled to the third transistor and receives the low voltage and the gate reference signal.
    Type: Application
    Filed: April 27, 2016
    Publication date: May 4, 2017
    Inventors: Chun-Da Tu, Yung-Chih Chen, Cheng-Han Huang, Kai-Wei Hong, Hsiang-Sheng Chang, Chuang-Cheng Yang
  • Patent number: 9620078
    Abstract: A touch display apparatus includes a touch driver and a display driver. The touch driver outputs touch signals to drive a touch panel. The display driver outputs scan signals to drive a display panel. A display driver has a plurality of shift registers, and each of the plurality of shift registers includes a pull-up unit, a driving unit, a pull-down unit and a holding unit. The pull-up unit is electrically connected to a driving node for outputting a driving voltage. The driving unit is electrically connected to the driving node for outputting a first scan signal according to a clock. A pull-down unit is electrically connected to the driving node and the output terminal, for pulling down the voltage level of the driving voltage and the first scan signal, respectively. The holding unit is electrically connected to the driving node.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: April 11, 2017
    Assignee: AU OPTRONICS CORP.
    Inventors: Kai-Wei Hong, Hsiang-Sheng Chang, Yung-Chih Chen, Chun-Da Tu, Cheng-Han Huang, Chuang-Cheng Yang
  • Publication number: 20160365061
    Abstract: A touch display apparatus includes a touch driver and a display driver. The touch driver outputs touch signals to drive a touch panel. The display driver outputs scan signals to drive a display panel. A display driver has a plurality of shift registers, and each of the plurality of shift registers includes a pull-up unit, a driving unit, a pull-down unit and a holding unit. The pull-up unit is electrically connected to a driving node for outputting a driving voltage. The driving unit is electrically connected to the driving node for outputting a first scan signal according to a clock. A pull-down unit is electrically connected to the driving node and the output terminal, for pulling down the voltage level of the driving voltage and the first scan signal, respectively. The holding unit is electrically connected to the driving node.
    Type: Application
    Filed: September 22, 2015
    Publication date: December 15, 2016
    Inventors: Kai-Wei HONG, Hsiang-Sheng CHANG, Yung-Chih CHEN, Chun-Da TU, Cheng-Han HUANG, Chuang-Cheng YANG