Abstract: An electrical connector includes an electrical connector housing having a body with a receiving portion, a movable pin, a part of the movable pin is movably disposed in the receiving portion, a first elastic piece disposed in the receiving portion, and a second elastic piece located between a side wall of the receiving portion and the movable pin and elastically abutted against an outer circumferential surface of the movable pin. A first end of the movable pin movably protrudes out of the receiving portion against an elasticity of the first elastic piece. The movable pin is electrically connected to the electrical connector housing by the first elastic piece and the second elastic piece.

Abstract: An electrical connector includes an electrical connector housing having a body with a receiving portion, a movable pin, a part of the movable pin is movably disposed in the receiving portion, a first elastic piece disposed in the receiving portion, and a second elastic piece located between a side wall of the receiving portion and the movable pin and elastically abutted against an outer circumferential surface of the movable pin. A first end of the movable pin movably protrudes out of the receiving portion against an elasticity of the first elastic piece. The movable pin is electrically connected to the electrical connector housing by the first elastic piece and the second elastic piece.

Abstract: A method is provided for rebuilding a flash translation layer table of a solid state drive. The superblock includes plural superpages. Each of the plural superpages includes plural physical pages. The method includes steps of confirming if the flash translation layer table is lost or not after the solid state drive is powered on; if the flash translation layer table is lost, starting a superblock scanning method for determining a status of the superblock; and rebuilding the flash translation table according to the status of the superblock. The superblock scanning method includes steps of reading contents of a first physical page and a last physical page of a last superpage in the superblock, and determining a status of the superblock according to the contents of the first physical page and the last physical page.

Abstract: A data programming method for a solid state drive is provided. The solid state drive has a flash memory with plural blocks. If a garbage collection is determined to be performed, a first open block is selected from the plural blocks of the flash memory for storing a moved valid data corresponding to the garbage collection. Then, the moved valid data corresponding to the garbage collection is programmed into the first open block. A second open block is selected from the plural blocks of the flash memory for storing a write data from a host.

Abstract: A superblock scanning method is provided for scanning a superblock of a solid state drive. The superblock includes plural superpages. Each of the plural superpages includes plural physical pages. The superblock scanning method includes steps of reading contents of a first physical page and a last physical page of a last superpage in the superblock, and determining a status of the superblock according to the contents of the first physical page and the last physical page.

Abstract: A flash translation layer table rebuilding method for a solid state drive is provided. The solid state drive includes a non-volatile memory and a buffering circuit. Firstly, a flash translation layer table is loaded from the non-volatile memory to the buffering circuit. In case that an abnormal shutdown event occurs, plural blocks of the non-volatile memory to be read are determined according to a specified block programming serial number of the flash translation layer table. Then, a read sequence of reading the plural blocks is determined according to a block programming serial number or an auxiliary serial number corresponding to the block. The contents of the blocks are read according to the read sequence. A mapping relationship between plural physical allocation addresses and plural logical block addresses of the flash translation layer table is updated.

Abstract: A flash translation layer table rebuilding method for a solid state drive is provided. The solid state drive includes a non-volatile memory and a buffering circuit. Firstly, a flash translation layer table is loaded from the non-volatile memory to the buffering circuit. In case that an abnormal shutdown event occurs, plural blocks of the non-volatile memory to be read are determined according to a specified block programming serial number of the flash translation layer table. Then, a read sequence of reading the plural blocks is determined according to a block programming serial number or an auxiliary serial number corresponding to the block. The contents of the blocks are read according to the read sequence. A mapping relationship between plural physical allocation addresses and plural logical block addresses of the flash translation layer table is updated.

Abstract: A data programming method for a solid state drive is provided. The solid state drive has a flash memory with plural blocks. If a garbage collection is determined to be performed, a first open block is selected from the plural blocks of the flash memory for storing a moved valid data corresponding to the garbage collection. Then, the moved valid data corresponding to the garbage collection is programmed into the first open block. A second open block is selected from the plural blocks of the flash memory for storing a write data from a host.

Abstract: The present invention provides a charge storage device, comprising a pair of electrodes, each electrode being operable to store electric charge and having a respective capacitance CP, CN that is different to the other, with the ratio of the capacitances CP/CN being greater than 1. In exemplary embodiments, the charge storage device may be an asymmetrical supercapacitor, which is operable to provide an enhanced energy capacity by increasing the cell voltage through unequalising the electrode capacitance. Hence, by increasing the CP/CN ratio an improved power capability can be achieved over conventional devices, while offering a simple and low cost manufacturing strategy. The present invention has particular application with cameras, electric vehicles, elevators, renewable energy stores, fuel cells, batteries and many forms of electronic devices.

Abstract: The present invention provides a charge storage device, comprising a pair of electrodes, each electrode being operable to store electric charge and having a respective capacitance CP, CN that is different to the other, with the ratio of the capacitances CP/CN being greater than 1. In exemplary embodiments, the charge storage device may be an asymmetrical supercapacitor, which is operable to provide an enhanced energy capacity by increasing the cell voltage through unequalising the electrode capacitance. Hence, by increasing the CP/CN ratio an improved power capability can be achieved over conventional devices, while offering a simple and low cost manufacturing strategy. The present invention has particular application with cameras, electric vehicles, elevators, renewable energy stores, fuel cells, batteries and many forms of electronic devices.

Abstract: A method for testing integrated circuits includes forming a plurality of substantially identical first test structures, each comprising a first via structure connected to a first metal line, stress testing the plurality of first test structures to obtain a first plurality of failure times, and forming a plurality of substantially identical second test structures, each comprising a second via structure connected to a second metal line, wherein the second via structure has a substantially different reliability from the first via structure, and wherein the first metal line and the second metal line are substantially identical. The method further includes stress testing the plurality of second test structures to obtain a second plurality of failure times, and determining early failures of the plurality of first test structures and the plurality of second test structures.