Patents by Inventor Chuangtao CHEN

Chuangtao CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11429347
    Abstract: The present invention discloses an error unbiased approximate multiplier for normalized floating-point numbers and an implementation method of the error unbiased approximate multiplier. The error unbiased approximate multiplier includes a symbol and exponent bit module, a mantissa approximation module and a normalization module, wherein the symbol and exponent bit module processes symbolic operation and exponent bit operation of the floating-point numbers; the mantissa approximation module obtains a mantissa approximation result under different accuracy requirements by summing a result of multilevel error correction modules; and the normalization module adjusts an exponent bit according to the operation result of the mantissa and processes the overflow of the exponent bit to obtain the final product result.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: August 30, 2022
    Assignee: ZHEJIANG UNIVERSITY
    Inventors: Cheng Zhuo, Chuangtao Chen, Sen Yang
  • Publication number: 20220083313
    Abstract: The present invention discloses an error unbiased approximate multiplier for normalized floating-point numbers and an implementation method of the error unbiased approximate multiplier. The error unbiased approximate multiplier includes a symbol and exponent bit module, a mantissa approximation module and a normalization module, wherein the symbol and exponent bit module processes symbolic operation and exponent bit operation of the floating-point numbers; the mantissa approximation module obtains a mantissa approximation result under different accuracy requirements by summing a result of multilevel error correction modules; and the normalization module adjusts an exponent bit according to the operation result of the mantissa and processes the overflow of the exponent bit to obtain the final product result.
    Type: Application
    Filed: March 3, 2021
    Publication date: March 17, 2022
    Applicant: ZHEJIANG UNIVERSITY
    Inventors: Cheng ZHUO, Chuangtao CHEN, Sen YANG