Patents by Inventor Chuanyang Wang

Chuanyang Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140021885
    Abstract: An integrated LED controller drives and reads a passive dimmer and controls a power circuit for the LED. The integrated LED controller detects changes in the position of the passive dimmer and causes the power circuit to brighten or dim the LED accordingly. These functions are normally performed by multiple discrete components. However, the integrated LED controller is implemented as a single integrated circuit, thus reducing the size and cost of the LED dimming system. The integrated LED controller can also include a unified timing controller that coordinates the timing of multiple functions within the controller in a manner that reduces the noise sensitivity of the controller.
    Type: Application
    Filed: July 10, 2013
    Publication date: January 23, 2014
    Inventors: Liang Yan, Clarita C. Poon, Yimin Chen, Mark Eason, Chuanyang Wang
  • Publication number: 20130242625
    Abstract: A power converter that controls a collector current of a bipolar junction transistor (BJT) by controlling the base current to the BJT after having determined the gain of the BJT. A gain detection block determines a gain of the BJT during a first mode. A current calculation block generates a current setting for the base current based on the gain of the BJT determined by the gain detection block during a second mode distinct from the first mode. In some embodiments, the power converter may be included in a LED lamp system.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 19, 2013
    Applicant: IWATT INC.
    Inventors: Liang Yan, Clarita C. Poon, Hien Huu Bui, Chuanyang Wang, Andrew Kwok-Cheung Lee, John William Kesterson
  • Publication number: 20130241430
    Abstract: The embodiments disclosed herein describe the dynamic control of a switching power converter between different operation modes of the switching power converter. In one embodiment, the operation modes of the switching power converter include a switching mode and a linear mode. The switching power converter may be included in a LED lamp system according to one embodiment.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 19, 2013
    Applicant: IWATT, INC.
    Inventors: Andrew Kwok-Cheung Lee, Chuanyang Wang, Jiang Chen, Liang Yan
  • Patent number: 7750837
    Abstract: Techniques for adaptively generating bias current for a switched-capacitor circuit are described. The switched-capacitor circuit charges and discharges at least one switching capacitor at a sampling rate and may be a ?? ADC that digitizes an analog signal at the sampling rate and provides digital samples. The switched-capacitor circuit may support multiple modes associated with different sampling rates. A bias circuit generates a bias current for the switched-capacitor circuit to be proportional to the sampling rate for a selected mode, to provide a bandwidth proportional to the sampling rate for an operational transconductance amplifier (OTA) within the switched-capacitor circuit, and to track changes in the switching capacitor(s) due to variations in integrated circuit (IC) process and temperature. The settling time of the switched-capacitor circuit may track with the multiple modes and across IC process and temperature variations.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: July 6, 2010
    Assignee: QUALCOMM Incorporated
    Inventors: Chuanyang Wang, Xiaohong Quan, Seyfollah Bazarjani
  • Publication number: 20100026542
    Abstract: Techniques for adaptively generating bias current for a switched-capacitor circuit are described. The switched-capacitor circuit charges and discharges at least one switching capacitor at a sampling rate and may be a ?? ADC that digitizes an analog signal at the sampling rate and provides digital samples. The switched-capacitor circuit may support multiple modes associated with different sampling rates. A bias circuit generates a bias current for the switched-capacitor circuit to be proportional to the sampling rate for a selected mode, to provide a bandwidth proportional to the sampling rate for an operational transconductance amplifier (OTA) within the switched-capacitor circuit, and to track changes in the switching capacitor(s) due to variations in integrated circuit (IC) process and temperature. The settling time of the switched-capacitor circuit may track with the multiple modes and across IC process and temperature variations.
    Type: Application
    Filed: August 1, 2008
    Publication date: February 4, 2010
    Applicant: QUALCOMM Incorporated
    Inventors: Chuanyang Wang, Xiaohong Quan, Seyfollah Bazarjani
  • Publication number: 20080204601
    Abstract: A low bandwidth signal path is added to copy internal node DC signal to output node. Therefore, for a DC or low frequency signal, the output signal is controlled by this loop. On the other hand, a high frequency signal is not affected because of the low-bandwidth of added loop. Thus, both DC and AC coupling modes are realized for components such as low-voltage video drivers.
    Type: Application
    Filed: February 22, 2007
    Publication date: August 28, 2008
    Applicant: Texas Instruments
    Inventors: Chuanyang Wang, Francisco Ledesma, Alexander Herve Reyes
  • Patent number: 6927933
    Abstract: An apparatus configured according to characteristics for driving a write head to write to a memory device includes: (a) a current directing circuit directing a write current through a first circuit path or a second including the write head in response to a first or second write signal; (b) at least one of: (1) an impedance system for including at least one impedance unit within each of the first and second current paths; and (2) a current system for including at least one circuit element between a locus at each end of said write head and a supply voltage; and (c) a control unit coupled with at least one of the impedance system and the current system for effecting the including for at least one of the impedance system and the current system to effect configuring the apparatus.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: August 9, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Davy H. Choi, Chuanyang Wang
  • Publication number: 20040245985
    Abstract: An apparatus for monitoring changes in a magnetic field using a magneto-resistive device situated in the field includes a first and second input locus coupled with the magneto-resistive device. An amplifier means for amplifying electrical signals has input terminals and output terminals. A first input terminal is coupled with the first input locus with a first capacitor coupled in series between the first input locus and the first input terminal. A second input terminal is coupled with the second input locus with a second capacitor coupled in series between the second input locus and the second input terminal. The apparatus receives a bias current at the first input locus that cooperates with the magneto-resistive element to affect electrical potential at the first input locus. The amplifier device presents at least one output signal at the output terminals indicating changes in the magnetic field.
    Type: Application
    Filed: June 3, 2003
    Publication date: December 9, 2004
    Inventors: Glenn Mayfield, Chuanyang Wang, Indumini Ranmuthu, Bryan E. Bloodworth, James Nodar
  • Publication number: 20040196585
    Abstract: An apparatus configured according to characteristics for driving a write head to write to a memory device includes: (a) a current directing circuit directing a write current through a first circuit path or a second including the write head in response to a first or second write signal; (b) at least one of: (1) an impedance system for including at least one impedance unit within each of the first and second current paths; and (2) a current system for including at least one circuit element between a locus at each end of said write head and a supply voltage; and (c) a control unit coupled with at least one of the impedance system and the current system for effecting the including for at least one of the impedance system and the current system to effect configuring the apparatus.
    Type: Application
    Filed: April 2, 2003
    Publication date: October 7, 2004
    Inventors: Davy H. Choi, Chuanyang Wang