Patents by Inventor Chuanzhao Yu
Chuanzhao Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240029942Abstract: A stacked transformer or inductor apparatus including a first layer with a first layer wire element extending around a center axis and a second layer with a second layer wire element. The second layer element includes side by side first and second wire sections in parallel spaced relation extending around the center axis and the first wire section is connected to the first layer wire element to form a primary turn winding. A third layer includes a third layer wire element extending around the center axis and connected to the second wire section of the second layer wire element to form a secondary turn winding partially overlapping with the primary turn winding.Type: ApplicationFiled: May 22, 2023Publication date: January 25, 2024Inventors: Chuanzhao Yu, Qiang Li, David Newman
-
Patent number: 11694836Abstract: A stacked transformer or inductor apparatus including a first layer with a first layer wire element extending around a center axis and a second layer with a second layer wire element. The second layer element includes side by side first and second wire components in parallel spaced relation extending around the center axis and the first wire component is connected to the first layer wire element to form a primary turn winding. A third layer includes a third layer wire element extending around the center axis and connected to the second wire component of the second layer wire element to form a secondary turn winding partially overlapping with the primary turn winding.Type: GrantFiled: March 30, 2018Date of Patent: July 4, 2023Assignee: Intel CorporationInventors: Chuanzhao Yu, Qiang Li, David Newman
-
Publication number: 20230198124Abstract: A wireless communication device can include switch circuitry. The switch circuitry can include stacks having a common gate node and a common body node, wherein a stack includes a metal-oxide-semiconductor field-effect transistor (MOSFET) having a body resistive element coupled to a body terminal of the MOSFET and the common body node a gate resistive element coupled to a gate terminal of the MOSFET and the common gate node. The switch circuitry can further include a self-biased MOSFET coupled to the common gate node and the common body node, a gate of the self-biased MOSFET configured to receive direct current (DC) bias with a low pass filter.Type: ApplicationFiled: December 16, 2021Publication date: June 22, 2023Inventors: Chuanzhao Yu, Hyun Yoon, Muhammed Elgousi, Xi Li, LiChung Tony Chang
-
Publication number: 20230198479Abstract: A method for harmonic trapping in a matching network of a power amplifier includes determining primary inductance and secondary inductance of a differential transformer of the matching network, based on a signal operating frequency of the power amplifier. An inductance value for an L-C filter is determined based on the secondary inductance and a harmonic frequency of a local oscillator (LO) signal. A capacitance value for the L-C filter is determined based on the inductance value and the harmonic frequency of the LO signal. The L-C filter is provided on an electric connection between a direct current (DC) bias voltage source and a secondary inductor of the differential transformer. The L-C filter is configured with the determined inductance value and the determined capacitance value.Type: ApplicationFiled: December 22, 2021Publication date: June 22, 2023Inventors: Muhammed Elgousi, Chuanzhao Yu, Hyun Yoon, Xi Li, LiChung Tony Chang
-
Publication number: 20230198470Abstract: An amplifier, communication device and method of amplification are disclosed. An RF signal is amplified by a Doherty power amplifier (DPA). The DPA has a main amplifier with a Class-AB amplifier in parallel with a Class-C amplifier. When the RF signal power is smaller than 6 dB PBO, the Class-AB amplifier provides the main amplifier amplification; when the RF signal is between 6 dB PBO and 0 dB PBO, both the Class-AB and Class-C amplifiers provide the main amplifier amplification.Type: ApplicationFiled: December 20, 2021Publication date: June 22, 2023Inventors: Stefano Pellerano, Chuanzhao Yu, JongSeok Park, LiChung Tony Chang
-
Patent number: 11632108Abstract: Techniques are provided for fanning out a signal from a balun. In various aspects, the system can include a balun configured to receive a signal for transmission at an input and to provide a representation of the signal at an output, a plurality of pass gate circuits, each pass gate circuit configured to receive the representation of the signal at a first node, to receive a control signal at a second node to pass the representation of the signal to a third node when the control signal is in a first state, and to isolate the representation of the signal from the third node when the control signal is in a second state. The first state of the control signal can include a non-zero voltage, and the second state of the control signal can include the non-zero voltage with a polarity opposite the non-zero voltage of the first state.Type: GrantFiled: February 11, 2022Date of Patent: April 18, 2023Assignee: Intel CorporationInventors: Chuanzhao Yu, Stephan Leuschner, David Newman
-
Patent number: 11632092Abstract: An on-chip transformer circuit is disclosed. The on-chip transformer circuit comprises a primary winding circuit comprising at least one turn of a primary conductive winding arranged as a first N-sided polygon in a first dielectric layer of a substrate; and a secondary winding circuit comprising at least one turn of a secondary conductive winding arranged as a second N-sided polygon in a second, different, dielectric layer of the substrate. In some embodiments, the primary winding circuit and the secondary winding circuit are arranged to overlap one another at predetermined locations along the primary conductive winding and the secondary conductive winding, wherein the predetermined locations comprise a number of locations less than all locations along the primary conductive winding and the secondary conductive winding.Type: GrantFiled: May 10, 2021Date of Patent: April 18, 2023Assignee: Intel CorporationInventors: Kaushik Dasgupta, Chuanzhao Yu, Chintan Thakkar, Saeid Daneshgar, Hyun Yoon, Xi Li, Anandaroop Chakrabarti, Stefan Shopov
-
Publication number: 20220416722Abstract: Amplifier circuits, radio communication circuits, radio communication devices, and methods provided in this disclosure provide an amplifier circuit. The amplifier circuit may include an amplifier configured to amplify an input signal to provide an output signal. The amplifier circuit may further include an amplifier stack including a first transistor coupled to the amplifier. The amplifier stack may be configured to receive the output signal to amplify the output signal. The amplifier stack may be configured to receive an input control signal to control the first transistor based on an envelope of the input signal.Type: ApplicationFiled: June 23, 2021Publication date: December 29, 2022Inventors: Chuanzhao YU, LiChung CHANG
-
Publication number: 20220416733Abstract: Amplifier circuits, radio communication circuits, radio communication devices, and methods provided in this disclosure. The amplifier circuit may include an amplifier configured to amplify an input signal to provide an output signal. The output signal of the amplifier may include a direct current (DC) signal. The amplifier circuit may further include a current source coupled to the amplifier. The current source may be configured to receive an electrical supply. The current source may further be configured to divide the direct current (DC) signal of the output signal based on the electrical supply.Type: ApplicationFiled: June 23, 2021Publication date: December 29, 2022Inventor: Chuanzhao YU
-
Publication number: 20220407544Abstract: Radio communication circuits, radio transmitters, and methods are provided in this disclosure. The radio communication circuit may include a modulator configured to provide a first modulated signal including a carrier signal at a carrier frequency, and a second modulated signal including the carrier signal at the carrier frequency. The radio communication circuit may further include a phase shift generator configured to receive a first signal based on the first modulated signal and a second signal based on the second modulated signal. The phase shift generator of the radio communication circuit may further be configured to provide a predefined phase difference between the first signal and the second signal.Type: ApplicationFiled: June 22, 2021Publication date: December 22, 2022Inventors: Woorim SHIN, Ritesh A. BHAT, Chuanzhao YU, Stefano PELLERANO
-
Patent number: 11437971Abstract: Embodiments relate to a transformer-based impedance matching network that may dynamically change its characteristic impedance by engaging different inductor branches on a primary side and optionally, on the secondary side. A primary side transformer circuit includes a primary inductor (311) and secondary inductor (321) configured to provide impedance matching over a first frequency band. One or more additional inductor branches (314A, 314B, are switchably coupled to either or both of the primary and secondary inductors to modify the impedance matching characteristics over additional operating frequencies. One or more LC filter branches (321, 322, 326, 327, 336, 330) can be included at the output of the secondary side to filter harmonic frequencies in each of the operating frequency bands.Type: GrantFiled: June 27, 2018Date of Patent: September 6, 2022Assignee: INTEL CORPORATIONInventors: Chuanzhao Yu, Maximilian Eschbaumer
-
Publication number: 20220166430Abstract: Techniques are provided for fanning out a signal from a balun. In various aspects, the system can include a balun configured to receive a signal for transmission at an input and to provide a representation of the signal at an output, a plurality of pass gate circuits, each pass gate circuit configured to receive the representation of the signal at a first node, to receive a control signal at a second node to pass the representation of the signal to a third node when the control signal is in a first state, and to isolate the representation of the signal from the third node when the control signal is in a second state. The first state of the control signal can include a non-zero voltage, and the second state of the control signal can include the non-zero voltage with a polarity opposite the non-zero voltage of the first state.Type: ApplicationFiled: February 11, 2022Publication date: May 26, 2022Inventors: Chuanzhao Yu, Stephan Leuschner, David Newman
-
Patent number: 11283444Abstract: Techniques are provided for fanning out a signal from a balun. In various aspects, the system can include a balun configured to receive a signal for transmission at an input and to provide a representation of the signal at an output, a plurality of pass gate circuits, each pass gate circuit configured to receive the representation of the signal at a first node, to receive a control signal at a second node to pass the representation of the signal to a third node when the control signal is in a first state, and to isolate the representation of the signal from the third node when the control signal is in a second state. The first state of the control signal can include a non-zero voltage, and the second state of the control signal can include the non-zero voltage with a polarity opposite the non-zero voltage of the first state.Type: GrantFiled: March 28, 2018Date of Patent: March 22, 2022Assignee: Intel CorporationInventors: Chuanzhao Yu, Stephan Leuschner, David Newman
-
Publication number: 20220038069Abstract: An on-chip transformer circuit is disclosed. The on-chip transformer circuit comprises a primary winding circuit comprising at least one turn of a primary conductive winding arranged as a first N-sided polygon in a first dielectric layer of a substrate; and a secondary winding circuit comprising at least one turn of a secondary conductive winding arranged as a second N-sided polygon in a second, different, dielectric layer of the substrate. In some embodiments, the primary winding circuit and the secondary winding circuit are arranged to overlap one another at predetermined locations along the primary conductive winding and the secondary conductive winding, wherein the predetermined locations comprise a number of locations less than all locations along the primary conductive winding and the secondary conductive winding.Type: ApplicationFiled: August 18, 2021Publication date: February 3, 2022Inventors: Kaushik Dasgupta, Chuanzhao Yu, Chintan Thakkar, Saeid Daneshgar, Hyun Yoon, Xi Li, Anandaroop Chakrabarti, Stefan Shopov
-
Publication number: 20210313943Abstract: An on-chip transformer circuit is disclosed. The on-chip transformer circuit comprises a primary winding circuit comprising at least one turn of a primary conductive winding arranged as a first N-sided polygon in a first dielectric layer of a substrate; and a secondary winding circuit comprising at least one turn of a secondary conductive winding arranged as a second N-sided polygon in a second, different, dielectric layer of the substrate. In some embodiments, the primary winding circuit and the secondary winding circuit are arranged to overlap one another at predetermined locations along the primary conductive winding and the secondary conductive winding, wherein the predetermined locations comprise a number of locations less than all locations along the primary conductive winding and the secondary conductive winding.Type: ApplicationFiled: May 10, 2021Publication date: October 7, 2021Inventors: Kaushik Dasgupta, Chuanzhao Yu, Chintan Thakkar, SAEID DANESHGAR, Hyun Yoon, Xi Li, Anandaroop Chakrabarti, Stefan Shopov
-
Patent number: 11075779Abstract: A buffer circuit includes a first feedback buffer to receive a first component of a current-mode signal and a second feedback buffer to receive a second component of the current-mode signal. The buffer circuit also including a first inverter having a first input coupled to an output of the second feedback buffer and to an input of a first current circuit through a first filter, a first output coupled to an input of the first feedback buffer. The buffer circuit also includes a second inverter having a second input coupled to an output of the first feedback buffer and to an input of a second current circuit through a second filter, and a second output coupled to an input of the second feedback buffer.Type: GrantFiled: March 30, 2018Date of Patent: July 27, 2021Assignee: Intel CorporationInventors: Chuanzhao Yu, Hyun Yoon, Kurt Hausmann
-
Patent number: 11031918Abstract: An on-chip transformer circuit is disclosed. The on-chip transformer circuit comprises a primary winding circuit comprising at least one turn of a primary conductive winding arranged as a first N-sided polygon in a first dielectric layer of a substrate; and a secondary winding circuit comprising at least one turn of a secondary conductive winding arranged as a second N-sided polygon in a second, different, dielectric layer of the substrate. In some embodiments, the primary winding circuit and the secondary winding circuit are arranged to overlap one another at predetermined locations along the primary conductive winding and the secondary conductive winding, wherein the predetermined locations comprise a number of locations less than all locations along the primary conductive winding and the secondary conductive winding.Type: GrantFiled: November 1, 2018Date of Patent: June 8, 2021Assignee: Intel CorporationInventors: Kaushik Dasgupta, Chuanzhao Yu, Chintan Thakkar, Saeid Daneshgar, Hyun Yoon, Xi Li, Anandaroop Chakrabarti, Stefan Shopov
-
Publication number: 20210119596Abstract: Embodiments relate to a transformer-based impedance matching network that may dynamically change its characteristic impedance by engaging different inductor branches on a primary side and optionally, on the secondary side. A primary side transformer circuit includes a primary inductor (311) and secondary inductor (321) configured to provide impedance matching over a first frequency band. One or more additional inductor branches (314A, 314B, are switchably coupled to either or both of the primary and secondary inductors to modify the impedance matching characteristics over additional operating frequencies. One or more LC filter branches (321, 322, 326, 327, 336, 330) can be included at the output of the secondary side to filter harmonic frequencies in each of the operating frequency bands.Type: ApplicationFiled: June 27, 2018Publication date: April 22, 2021Inventors: Chuanzhao YU, Maximilian ESCHBAUMER
-
Publication number: 20210065963Abstract: A stacked transformer or inductor apparatus including a first layer with a first layer wire element extending around a center axis and a second layer with a second layer wire element. The second layer element includes side by side first and second wire components in parallel spaced relation extending around the center axis and the first wire component is connected to the first layer wire element to form a primary turn winding. A third layer includes a third layer wire element extending around the center axis and connected to the second wire component of the second layer wire element to form a secondary turn winding partially overlapping with the primary turn winding.Type: ApplicationFiled: March 30, 2018Publication date: March 4, 2021Inventors: Chuanzhao Yu, Qiang Li, David Newman
-
Patent number: 10897236Abstract: Wideband signal buffers that can be employed for mmWave (millimeter wave) communication are disclosed. One example signal buffer comprises a variable gain amplifier (VGA) that receives two control words and outputs a feedback signal, wherein both an amplitude and a phase of the feedback signal are based on the two control words and on a bias voltage; and a matching network comprising a first inductor that outputs the bias voltage, a second inductor, and a third inductor that receives the feedback signal from the VGA, and wherein the first, second, and third inductors are magnetically coupled to each other, wherein the signal buffer is configured to receive a RF (Radio Frequency) input and to generate a RF output from the RF input based on a transfer function of the signal buffer, wherein the transfer function is based at least in part on the feedback signal.Type: GrantFiled: November 7, 2018Date of Patent: January 19, 2021Assignee: Apple Inc.Inventors: Chuanzhao Yu, Kurt Hausmann, Stephen Rector