Abstract: An integrated circuit package includes a semiconductor chip having a passivation layer forming the top surface of the semiconductor chip and a metal pad formed on the passivation layer and a discrete electronic device having a first terminal formed on a first surface and a second terminal formed on a second surface opposite the first surface of the discrete electronic device where the first surface of the discrete electronic device is attached to the metal pad using a conductive adhesive structure. The semiconductor chip and the discrete electronic device are encapsulated in an encapsulation material. An electrical connection is formed between the metal pad and one of a bond pad of the semiconductor chip or a package post of the integrated circuit package. In one embodiment, the metal pad is an aluminum pad and a metal line connects the metal pad to a bond pad of the semiconductor chip.

Abstract: An integrated circuit package includes a semiconductor chip having a passivation layer forming the top surface of the semiconductor chip and a metal pad formed on the passivation layer and a discrete electronic device having a first terminal formed on a first surface and a second terminal formed on a second surface opposite the first surface of the discrete electronic device where the first surface of the discrete electronic device is attached to the metal pad using a conductive adhesive structure. The semiconductor chip and the discrete electronic device are encapsulated in an encapsulation material. An electrical connection is formed between the metal pad and one of a bond pad of the semiconductor chip or a package post of the integrated circuit package. In one embodiment, the metal pad is an aluminum pad and a metal line connects the metal pad to a bond pad of the semiconductor chip.

Abstract: An integrated circuit package includes a semiconductor chip having a passivation layer forming the top surface of the semiconductor chip and a metal pad formed on the passivation layer and a discrete electronic device having a first terminal formed on a first surface and a second terminal formed on a second surface opposite the first surface of the discrete electronic device where the first surface of the discrete electronic device is attached to the metal pad using a conductive adhesive structure. The semiconductor chip and the discrete electronic device are encapsulated in an encapsulation material. An electrical connection is formed between the metal pad and one of a bond pad of the semiconductor chip or a package post of the integrated circuit package. In one embodiment, the metal pad is an aluminum pad and a metal line connects the metal pad to a bond pad of the semiconductor chip.

Abstract: A switching regulator includes a compensation circuit for applying a scaling factor to the loop gain of the feedback control loop of the regulator. In operation, the loop gain of the feedback control loop has a dependency on the input and output voltages of the switching regulator. The compensation circuit applies a function as the scaling factor where the function is a reciprocal function of the loop gain dependency on the input voltage and output voltage. In one embodiment, the loop gain has a dependency on the ratio VIN/VOUT and a scaling factor having a value indicative of the ratio VOUT/VIN is applied by the compensation circuit. In one embodiment, the compensation circuit is coupled in series with the output circuit of an error amplifier in the feedback control loop of the regulator. In another embodiment, the compensation circuit is subsumed within the circuitry of the error amplifier.

Abstract: A switching regulator includes a compensation circuit for applying a scaling factor to the loop gain of the feedback control loop of the regulator. In operation, the loop gain of the feedback control loop has a dependency on the input and output voltages of the switching regulator. The compensation circuit applies a function as the scaling factor where the function is a reciprocal function of the loop gain dependency on the input voltage and output voltage. In one embodiment, the loop gain has a dependency on the ratio VIN/VOUT and a scaling factor having a value indicative of the ratio VOUT/VIN is applied by the compensation circuit. In one embodiment, the compensation circuit is coupled in series with the output circuit of an error amplifier in the feedback control loop of the regulator. In another embodiment, the compensation circuit is subsumed within the circuitry of the error amplifier.