Patents by Inventor Chuen Khiang Wang

Chuen Khiang Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080251938
    Abstract: A semiconductor chip package and method of making the same. A first chip unit includes a first substrate and a first IC chip electrically connected to the first substrate. A second chip unit includes a second substrate and a second IC chip electronically connected to the second substrate. An adhesive material is provided on a surface of the first IC chip and the second chip unit is mounted onto the surface of the first chip unit including the adhesive material so that at least a portion of the second structure is encapsulated by the adhesive material, thereby providing some encapsulation in the same step as mounting. The first chip unit and the second chip unit may be separated by a spacer which may also provide an electrical connection.
    Type: Application
    Filed: April 7, 2008
    Publication date: October 16, 2008
    Inventors: Chuen Khiang Wang, Hien Boon Tan, Anthony Yi Sheng Sun, Sin Nee Song, Steven Yu Feng Yao, Hua Hong Tan
  • Publication number: 20080150103
    Abstract: A method for of manufacturing integrated circuit packages and a multi-chip integrated circuit package are disclosed. According to the method, a first die is attached onto a first side of a set of leads of a leadframe, and an adhesive is applied onto the set of leads at a second side opposite to the first side. A second die is attached onto the adhesive. The adhesive fills into the gaps defined by the set of leads. The adhesive is thereafter cured. In a multi-chip integrated circuit package made according to the method, the adhesive attaching the second die fills the gaps between the leads so that to avoid formation of internal cavities of the package.
    Type: Application
    Filed: September 9, 2005
    Publication date: June 26, 2008
    Inventors: Chuen Khiang Wang, Hao Liu, Hien Boon Tan, Clifton Teik Lyk Law, Rahamat Bidin, Anthony Yi Shen Sun
  • Publication number: 20070132081
    Abstract: A semiconductor package including a first substrate having a die receiving area, a first adhesive layer, a window opening, and a plurality of conductive traces, a first semiconductor die having two sides and with an electrically active side mounted to the substrate through the first adhesive layer, a second adhesive layer having a first side attached to an electrically inactive side of the first semiconductor die, a second substrate having a die receiving area and a plurality of conductive traces and terminals, a last adhesive layer having a first side attached to a side of the second substrate with the terminals, a last semiconductor die having two sides and with an electrically inactive side being mounted to the second side of the third adhesive layer, and an electrically active side being electrically coupled to the conductive traces of the first or second substrate directly or through a redistribution device, and an encapsulant to encapsulate the semiconductor dies and electrical coupling, and signal tran
    Type: Application
    Filed: March 3, 2005
    Publication date: June 14, 2007
    Applicant: UNITED TEST AND ASSEMBLY CENTER LIMITED
    Inventors: Chuen Khiang Wang, Hien Boon Tan, Koon Hwee Joanne Teo, Sin Nee Song, Koon Lua
  • Publication number: 20060192292
    Abstract: A semiconductor chip package and method of making the same. A first chip unit includes a first substrate and a first IC chip electrically connected to the first substrate. A second chip unit includes a second substrate and a second IC chip electronically connected to the second substrate. An adhesive material is provided on a surface of the first IC chip and the second chip unit is mounted onto the surface of the first chip unit including the adhesive material so that at least a portion of the second structure is encapsulated by the adhesive material, thereby providing some encapsulation in the same step as mounting. The first chip unit and the second chip unit may be separated by a spacer which may also provide an electrical connection.
    Type: Application
    Filed: October 28, 2005
    Publication date: August 31, 2006
    Inventors: Chuen Khiang Wang, Hien Boon Tan, Anthony Yi Sheng Sun, Sin Nee Song, Steven Yu Yao, Hua Hong Tan