Patents by Inventor Chuen Ming Tan

Chuen Ming Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240126354
    Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed for power budgeting for computer peripherals with electronic devices. An example apparatus to budget power in an electronic device includes interface circuitry; machine readable instructions; and programmable circuitry to at least one of instantiate or execute the machine readable instructions to: detect a Type-C event associated with a computer peripheral; write a power level offset based on an assumed power contract for the computer peripheral during debounce time; obtain an actual power contract for the computer peripheral; and adjust the power level offset based on the actual power contract.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Inventors: Kunal Shah, Prabhakar Subrahmanyam, Venkataramani Gopalakrishnan, Chuen Ming Tan, Venkataramana Kotakonda, Mitsu Shah, Kannappan Rajaraman, Yi Jen Huang, Dmitriy Berchanskiy, Swathi Nukala
  • Publication number: 20240104043
    Abstract: Embodiments herein relate to a module which can be inserted into or removed from a computing device by a user. The module includes an input-output port which is configured for a desired specification, such as USB-A, USB-C, Thunderbolt, DisplayPort or HDMI. The port can be provided on an expansion card such as an M.2 card for communicating with a host platform. The host platform can communicate with different types of modules in a standardized way so that complexity and costs are reduced. In another aspect, with a dual port module, the host platform can concurrently send/receive power through one port and send/receive data from the other port.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 28, 2024
    Inventors: Shailendra Singh Chauhan, Nirmala Bailur, Reza M. Zamani, Jackson Chung Peng Kong, Charuhasini Sunder Raman, Venkataramani Gopalakrishnan, Chuen Ming Tan, Sreejith Satheesakurup, Karthi Kaliswamy, Venkata Mahesh Gunnam, Yi Jen Huang, Kie Woon Lim, Dhinesh Sasidaran, Pik Shen Chee, Venkataramana Kotakonda, Kunal A. Shah, Ramesh Vankunavath, Siva Prasad Jangili Ganga, Ravali Pampala, Uma Medepalli, Tomer Savariego, Naznin Banu Wahab, Sindhusha Kodali, Manjunatha Venkatarauyappa, Surendar Jeevarathinam, Madhura Shetty, Deepak Sharma, Rohit Sharad Mahajan
  • Publication number: 20240019918
    Abstract: A power delivery architecture is described that improves system voltage conversion and operational efficiency. The power delivery architecture performs monitoring of various system conditions such as a current power state, a current power policy setting, workload conditions, component temperatures, a state of charge of a battery, etc. The power delivery architecture may adjust the power profile provided by a power delivery source, which may result in an adjustment to the VBUS voltage and/or current when a USB-based power delivery architecture is implemented. The power delivery architecture may also adjust a mode of operation of an onboard battery charger.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 18, 2024
    Inventors: Ravi Verma, Saunak Bhalsod, Venkataramani Gopalakrishnan, Archana Rao, Raghavendra Rao, Tomer Savariego, Chuen Ming Tan, Manjunatha V
  • Publication number: 20230409105
    Abstract: Embodiments herein relate to avoiding damage to a transistor in a power-sinking device that receives power from an external power source via a Universal Serial Bus port. In one aspect, a controller of the device sets a current limit to a reduced level during a wait period after the external power source is connected to the power-sinking device. The wait period avoids damage to the transistor by allowing its input and output voltages to equalize before the current is increased. Upon expiration of the wait period, the current limit is increased to a level negotiated with the external power source. Other aspects involve considering a sleep or low/dead battery state of the power-sinking device. The current limit can be set by programming a current limit of a battery charger coupled to between the transistor and a power bus of the device.
    Type: Application
    Filed: June 2, 2023
    Publication date: December 21, 2023
    Inventors: Shailendra Singh Chauhan, Mahesh Gunnam, Venkataramana Kotakonda, Chuen Ming Tan
  • Publication number: 20230409100
    Abstract: Embodiments herein relate to a power monitor that can be used to dynamically change a power level of an electronic device and/or operational settings of a processor of the electronic device. Specifically, the power monitor may be configured to identify “droop” of power, and logic to update the power level and/or operational settings in accordance with identification of the droop. Other embodiments may be described and claimed.
    Type: Application
    Filed: June 15, 2022
    Publication date: December 21, 2023
    Inventors: Shailendra Singh Chauhan, Arvind Sundaram, Manasa Nagamangala Sridhara, Anil Kumar Nama, Ramesh Vankunavath, Manjunath Channipura Hombaiah, Siva Prasad Jangili Ganga, Kunal Shah, Venkata Mahesh Gunnam, Chuen Ming Tan, Venkataramana Kotakonda
  • Publication number: 20230350479
    Abstract: Systems, apparatuses and methods may provide for technology that allocates a portion of operational power in a source device to an external sink device in response to a connection of the external sink device to the source device, detects a low power state with respect to the external sink device, and decreases the portion of operational power allocated to the external sink device in response to the low power state.
    Type: Application
    Filed: April 28, 2022
    Publication date: November 2, 2023
    Inventors: Venkataramani Gopalakrishnan, Chuen Ming Tan, Divagar Mohandass, Dmitriy Berchanskiy, Nirmala Bailur, Timothy Smith, Rajaram Regupathy
  • Publication number: 20230291220
    Abstract: Embodiments herein relate to an electronic circuit with a first port for providing a first power signal and a second port for providing a second power signal. Each of the ports may be coupled with a respective system gate and charging gate. A system gate may selectively couple a port with a system load, while the charging gate may selectively couple a port with a battery. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: March 14, 2022
    Publication date: September 14, 2023
    Inventors: Yi How OOI, Chuen Ming TAN, Tai Loong WONG, Wei Cheang LAU, Sze Geat PANG
  • Publication number: 20230280809
    Abstract: Embodiments herein relate to a computer which operates in a normal power mode, a full low power mode and a modified low power mode. A power supply unit (PSU) includes main power rails and a standby power rail. An intelligent decision is made as to when to turn on and off the main power rails based on the needs of connected devices such as USB Type-C devices. Power Delivery controllers communicate with the USB devices to determine their power consumption needs, and the total power consumption is aggregated at an embedded controller. If the total exceeds an available power budget, the PSU is controlled to allow for a modified low power mode in which full power is maintained at the main power rails while non-essential internal components are turned off.
    Type: Application
    Filed: March 1, 2022
    Publication date: September 7, 2023
    Inventors: Venkataramani GOPALAKRISHNAN, Chuen Ming TAN, Charuhasini SUNDER RAMAN, Philip R. LEHWALDER, N V S Kumar SRIGHAKOLLAPU
  • Publication number: 20230093974
    Abstract: In an embodiment, a computing system for selecting a power mode may include: a system load, a battery, a power converter to receive external power and provide output power, and a processor to: monitor a charge level of the battery while the computing system is in a converter power mode, where the converter power mode comprises to power the system load and charge the battery from the output power of the power converter; and in response to a determination that the charge level of the battery is within a battery condition range, cause the computing system to switch from the converter power mode to a battery power mode, where the battery power mode comprises, during a connection of the power converter to the external power, to disconnect the battery from the power converter and power the system load from output power of the battery.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Inventors: Chuen Ming Tan, Venkataramani Gopalakrishnan, Nirmala Bailur, Tai Loong Wong, Yi How Ooi, Sze Geat Pang, Wei Cheang Lau
  • Patent number: 9784279
    Abstract: A fan noise suppression circuit may be coupled between a power source and a power input to at least one fan. The fan noise suppression circuit may include an adjustable current source coupled to the power source. The adjustable current source may provide a voltage output and a current output based on a power output of the power source. The fan noise suppression circuit may include a feedback controller coupled to an output of the adjustable current source. The feedback controller may be configured to compare the voltage output to a reference voltage and provide an error value to the adjustable current source, wherein the adjustable current source may adjust the current output based on the error value.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: October 10, 2017
    Assignee: NATIONAL INSTRUMENTS CORPORATION
    Inventors: Chin-Hong Cheah, Chuen-Ming Tan
  • Publication number: 20170234317
    Abstract: A fan noise suppression circuit may be coupled between a power source and a power input to at least one fan. The fan noise suppression circuit may include an adjustable current source coupled to the power source. The adjustable current source may provide a voltage output and a current output based on a power output of the power source. The fan noise suppression circuit may include a feedback controller coupled to an output of the adjustable current source. The feedback controller may be configured to compare the voltage output to a reference voltage and provide an error value to the adjustable current source, wherein the adjustable current source may adjust the current output based on the error value.
    Type: Application
    Filed: February 17, 2016
    Publication date: August 17, 2017
    Inventors: Chin-Hong CHEAH, Chuen-Ming Tan
  • Patent number: 7454637
    Abstract: An on-die voltage regulator having a suspend mode voltage generator and an active mode voltage generator. Output drivers of the active mode voltage generator are disabled in stages to reduce voltage droop when transitioning between the active mode voltage generator and the suspend mode voltage generator.
    Type: Grant
    Filed: September 2, 2005
    Date of Patent: November 18, 2008
    Assignee: Intel Corporation
    Inventors: Kim Soi Er, Yick Yaw Ho, Chuen Ming Tan