Abstract: A pixel includes a plurality of transistors, a storage capacitor, and an organic light emitting diode. A first transistor controls the amount of current from a first driving power source to the organic light emitting diode based on a data voltage. A second transistor is connected to a data line and is turned on based on a scan signal. A third transistor coupled to the first transistor and is turned on based on the scan signal. A first stabilizing transistor is coupled to the third transistor or between the first and third transistors and is turned off when the third transistor is turned off.

Abstract: A pixel includes a plurality of transistors, a storage capacitor, and an organic light emitting diode. A first transistor controls the amount of current from a first driving power source to the organic light emitting diode based on a data voltage. A second transistor is connected to a data line and is turned on based on a scan signal. A third transistor coupled to the first transistor and is turned on based on the scan signal. A first stabilizing transistor is coupled to the third transistor or between the first and third transistors and is turned off when the third transistor is turned off.

Abstract: An organic light-emitting diode display is disclosed. In one aspect, the display includes a plurality of pixels formed in a plurality of intersection areas of a plurality of data lines and a plurality of scan lines. Each of the pixels includes a storage capacitor configured to store a data voltage, at least one target transistor having one end electrically connected to a current path of the storage capacitor, an organic light emitting layer, and a first electrode of an OLED formed over the organic light emitting layer. The first electrode includes a first electrode extension configured to block at least a portion of the target transistor from light.

Abstract: A display device includes a display panel including pixels; a panel driver to supply a scan signal and a data signal to the pixels; and a power supply to generate a first supply voltage and a second supply voltage, and to change the first supply voltage and/or the second supply voltage to provide it to the pixels. The pixels emit light in response to the scan signal based on the data signal during an emission period where a voltage difference between the first supply voltage and the second supply voltage is larger than a first reference voltage. A first voltage difference between the first supply voltage and the second supply voltage at a start of the emission period is larger than an average voltage difference between the first supply voltage and the second supply voltage throughout the emission period.

Abstract: A display panel driver drives pixels based on first power having at least three voltage levels, second power having a constant voltage, and third power having two voltage levels. Each pixel includes a first transistor connected between first and second nodes and including a gate electrode to receive a scan signal, a second transistor connected between the second node and a third node in series with the first transistor and including a gate electrode to receive the third power, and a driving transistor connected between a source of the first power and the third node and including a gate electrode connected to the first electrode to control a driving current for an organic light emitting diode. A first capacitor is connected between a source of the third power and the first node, and a second capacitor is connected between the second node and one of the data lines.

Abstract: A pixel includes a plurality of transistors, a storage capacitor, and an organic light emitting diode. A first transistor controls the amount of current from a first driving power source to the organic light emitting diode based on a data voltage. A second transistor is connected to a data line and is turned on based on a scan signal. A third transistor coupled to the first transistor and is turned on based on the scan signal. A first stabilizing transistor is coupled to the third transistor or between the first and third transistors and is turned off when the third transistor is turned off.

Abstract: A scan driver includes a plurality of circuit stages, each circuit stage including a first input part configured to transfer a carry signal to a first node in response to a first clock signal, a second input part configured to transfer the first clock signal to a second node in response to a signal of the first node, a first output part configured to transfer a third clock signal to an output terminal in response to a signal of the second node, a holding part configured to maintain a signal of a third node response to a second clock signal, and a second output part configured to transfer a signal of the third node to the output terminal in response to the second clock signal.

Abstract: A scan driver includes circuit stages each including a first input part to transfer a signal of a first node to a first output part having a second node in response to a first clock signal, a second input part to transfer a carry signal to the first node in response to a second clock signal that is different from the first clock signal, a holding part to maintain a signal of the second node, the first output part to transfer a third clock signal that is different from the first and second clock signals to an output terminal in response to the signal of the second node, a second output part to transfer the first clock signal to the output terminal in response to a signal of a third node, and a simultaneous driving part to turn off the second output part in response to the third clock signal.

Abstract: An organic light emitting display device includes a plurality of pixel columns, a first data wiring, a second data wiring, and a power supply wiring. The pixel columns include pixels repeatedly arranged in a first direction, and the pixel columns are repeatedly arranged in a second direction. The first and second directions are substantially perpendicular to each other. The first data wiring extends in the first direction and is connected to the pixels in an even row. The second data wiring extends in the first direction and are connected to the pixels in an odd row. The power supply wiring extends in the first direction between the first and second data wirings.

Abstract: A pixel including an organic light emitting diode; a first transistor for controlling the amount of current flowing from a first driving power source to a second driving power source via the organic light emitting diode, corresponding to a voltage of a first node; a second transistor coupled between the first node and a second node, the second transistor being turned on when a scan signal is supplied to an ith (i is a natural number) scan line; a third transistor coupled between the second node and an anode electrode of the organic light emitting diode; a first capacitor coupled between a data line and the second node; and a fourth transistor coupled between an initialization power source and the anode electrode of the organic light emitting diode. The fourth transistor is turned on in response to a first control signal being supplied to a first control line.

Abstract: A display device having a frame period including reset, compensation, relay, emission, and initialization periods. Each pixel includes: an organic light emitting diode having an anode coupled to a second node and a electrode coupled to a second power source; a first transistor between a first power source and the second node, and a gate electrode coupled to a first node; a second transistor between the first node and the second node; a third transistor between the first power source and a third node; a fourth transistor between a fourth node and the third node; a fifth transistor between a data line and the fourth node; a sixth transistor between a third power source and the second node; a first capacitor between the third node and the first node; and a second capacitor coupled the fourth node and the third power source.

Abstract: A display apparatus includes a plurality of pixels. A pixel includes a first capacitor connected between a first voltage line receiving a first driving signal and a first node, a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal and a second electrode connected to a second node, an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal, a second capacitor connected between an m-th data line and the second node (wherein, ‘m’ is a natural number) and a second transistor comprising a control electrode connected to an n-th scan line (wherein, ‘n’ is a natural number), a first electrode connected to the first node and a second electrode connected to the second node.

Abstract: A scan driver includes a plurality of stages to receive one or more clock signals, each of the plurality of stages to supply a carry signal to a corresponding first output terminal and to supply a scan signal to a corresponding second output terminal, corresponding to a voltage of a corresponding first node, and each of the plurality of stages including a reset unit, the reset unit to initialize the first node, the first output terminal, and the second output terminal, corresponding to a gate start pulse supplied to a corresponding reset input terminal.

Abstract: A display apparatus includes a plurality of pixels. A pixel includes a first capacitor connected between a first voltage line receiving a first driving signal and a first node, a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal and a second electrode connected to a second node, an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal, a second capacitor connected between an m-th data line and the second node (wherein, ‘m’ is a natural number) and a second transistor comprising a control electrode connected to an n-th scan line (wherein, ‘n’ is a natural number), a first electrode connected to the first node and a second electrode connected to the second node.

Abstract: A display device includes: an initialization power line extending along a first direction; a scan line extending along the first direction and spaced apart from the initialization power line, a data line and a driving voltage line insulated from the initialization power line and the scan line and extending along the second direction; a first switching element including a first electrode connected to the driving voltage line, a first gate electrode overlapping the initialization power line, and a second electrode; a second switching element including a third electrode connected to the first gate electrode, a second gate electrode connected to the scan line, and a fourth electrode; a third switching element including a fifth electrode connected to the fourth electrode, a third gate electrode connected to the initialization power line, and a sixth electrode connected to the second electrode; and a light emitting element connected to the second electrode.

Abstract: A pixel includes first to fourth transistors and a driving transistor. The first transistor is connected between a data line and a first node and has a gate electrode to receive a scan signal. The driving transistor is connected between the first node and a second node and has a gate electrode connected to a third node. The second transistor is connected between the second and third nodes and has a gate electrode to receive the scan signal. The third transistor is connected between first power and the first node and has a gate electrode to receive an emission signal. The fourth transistor is connected between the first and second nodes and has a gate electrode to receive an initialization signal. An organic light emitting diode is connected between the second node and second power. A storage capacitor is connected between the first power and third node.

Abstract: A stage circuit includes an output part configured to supply a carry signal to a first output terminal and a scan signal to a second output terminal, in response to a voltage of a first node, a voltage of a second node, and a first clock signal being supplied to a first input terminal, a controller configured to control the voltage of the second node in response to the first clock signal being supplied to the first input terminal, a pull-up part configured to control the voltage of the first node in response to a carry signal of a previous stage being supplied to a second input terminal, and a pull-down part configured to control the voltage of the first node in response to the voltage of the second node and the carry signal of a next stage being supplied to a third input terminal.

Abstract: An organic light emitting display device includes a plurality of pixels. A pixel on an ith horizontal line includes a first transistor coupled between a first power source and a first node and having a gate electrode coupled to a second node. An organic light emitting diode is coupled between the first node and a second power source. A second transistor is coupled between the second and third nodes and is turned on when a first scan signal is supplied to an ith first scan line. A third transistor is coupled between the third and first nodes. A first capacitor is coupled between an ith control line and the second node. A second capacitor is coupled between the third node and a data line. The pixels are simultaneously driven during first, second, and third periods of a frame period and sequentially driven during a fourth period of the frame period.

Abstract: A stage circuit includes an output circuit configured to supply, to a first output terminal, a first clock signal supplied to a second input terminal or to supply a voltage of a second power source supplied to a second power input terminal, in response to voltages of a first node and a second node, an input circuit configured to control voltages of a third node and a fourth node in response to a shift pulse or a gate start pulse supplied to a first input terminal, a third clock signal supplied to a third input terminal, and a fourth clock signal supplied to a fourth input terminal, and a first driver configured to control the voltages of the first and second nodes in response to both the third clock signal and the voltages of the third and fourth nodes.

Abstract: A gate driving circuit includes: a pull-up controller applying a carry signal of one of previous stages to a first node in response to the carry signal of the one of the previous stages; a pull-up part outputting a clock signal as an N-th gate output signal; a carry part outputting the clock signal as an N-th carry signal; a first pull-down part pulling down the signal at the first node to a second off voltage; a second pull-down part pulling down the N-th gate output signal to a first off voltage; an inverting part generating an inverting signal based on the clock signal and the second off voltage to output the inverting signal to an inverting node; and a reset part outputting a reset signal to the inverting node.