Patents by Inventor CHUL-JOONG PARK

CHUL-JOONG PARK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11728300
    Abstract: A semiconductor device includes a semiconductor substrate, an integrated device ort the semiconductor substrate, a first redistribution layer on the semiconductor substrate, the first redistribution layer having first conductive patterns electrically connected to the integrated device, a second redistribution layer on the first redistribution layer, the second redistribution layer having second conductive patterns connected to the first conductive patterns, and third conductive patterns on a top surface of the second redistribution layer. The third conductive patterns include pads connected to the second conductive patterns, under-bump pads spaced apart from the pads, a grouping pattern between the pads and an outer edge of the second redistribution layer, and wiring lines that connect the under-bump pads to the pads and connect the pads to the grouping pattern.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: August 15, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Woon-Ki Lee, Jae-Won Kim, Jongsun Jung, Chul-Joong Park, Ki-Bum Chun, Shivashanker Reddy Kesireddy, Sangwoo Pyo
  • Publication number: 20220068853
    Abstract: A semiconductor device includes a semiconductor Substrate, an integrated device ort the semiconductor substrate, a first redistribution layer on the semiconductor substrate, the first redistribution layer having first conductive patterns electrically connected to the integrated device, a second redistribution layer on the first redistribution layer, the second redistribution layer having second conductive patterns connected to the first conductive patterns, and third conductive patterns on a top surface of the second redistribution layer. The third conductive patterns include pads connected to the second conductive patterns, under-bump pads spaced apart from the pads, a grouping pattern between the pads and an outer edge of the second redistribution layer, and wiring lines that connect the under-bump pads to the pads and connect the pads to the grouping pattern.
    Type: Application
    Filed: April 15, 2021
    Publication date: March 3, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: WOON-KI LEE, JAE-WON KIM, JONGSUN JUNG, CHUL-JOONG PARK, KI-BUM CHUN, SHIVASHANKER REDDY KESIREDDY, SANGWOO PYO