Abstract: A scan driver includes: a first transistor having a first electrode coupled to an output scan line, a second electrode coupled to a first power line, and a gate electrode coupled to a first node; a second transistor having a first electrode coupled to a first clock line, a second electrode coupled to the output scan line, and a gate electrode coupled to a second node; a third transistor having a first electrode coupled to the first node, a second electrode coupled to a first input scan line, and a gate electrode coupled to a second clock line; and a fourth transistor having a first electrode coupled to the second node and a second electrode and a gate electrode, which are coupled to a second input scan line, wherein the first input scan line and the second input scan line are different from each other.

Abstract: A display device includes a pixel. The pixel is electrically connected to a first power line, a second power line, and a data line. The pixel includes a first transistor, and a capacitor electrically connected between a gate electrode of the first transistor and an electrode of the first transistor. In a plan view, the data line extends in a second direction. The first power line extends in a first direction intersecting the second direction and overlaps the data line and the gate electrode of the first transistor. The second power line extends in the second direction, overlaps the data line, and overlaps the gate electrode of the first transistor.

Abstract: A display apparatus includes a substrate including a display area for displaying an image, a first thin film transistor in the display area and including a first semiconductor layer having a silicon semiconductor and a first gate electrode insulated from the first semiconductor layer, a first interlayer insulating layer covering the first gate electrode and having a first contact hole extending therethrough, and a second thin film transistor on the first interlayer insulating layer and including a second semiconductor layer having an oxide semiconductor and a second gate electrode insulated from the second semiconductor layer. A portion of the second semiconductor layer extends into a first contact hole and is electrically connected to the first semiconductor layer.

Abstract: An organic light emitting display device driven at a first driving frequency or a second driving frequency lower than the first driving frequency includes pixels coupled to first scan lines, second scan lines, and data lines, a first scan driver configured to supply scan signals to the first scan lines during a first period and a second period in one frame period, when the organic light emitting display device is driven at the second driving frequency, a second scan driver configured to supply scan signals to the second scan lines during the first period, when the organic light emitting display device is driven at the second driving frequency, and a data driver configured to supply a data signal to the data lines during the first period.

Abstract: A display device includes: scan, control, and emission control signal lines, signals transmitted thereby being different from one another; data and driving voltage lines; a first transistor including a first gate electrode and first source and drain; a second transistor including a second gate electrode connected to a first scan line, a second source connected to a first data line, and a second drain connected to the first source; a light-emitting element; a control transistor including a control gate electrode connected to a first control line and between the driving voltage line and the first source or the light-emitting element and the first drain; and an emission control transistor in series between the light-emitting element and the control transistor, the control transistor and the first transistor, or the driving voltage line and the control transistor, and an emission control gate electrode connected to the emission control signal line.

Abstract: A circuit stage including a first transistor including a first electrode and a gate electrode, the first electrode being coupled to a first input terminal and the gate electrode being coupled to a second input terminal configured to receive a first clock signal, an output circuit coupled to the second input terminal and a second power input terminal, an input circuit coupled to a second electrode of the first transistor and to a third input terminal, the third input terminal being configured to receive a first control clock signal, the input circuit being configured to control voltages of the second node and a third node, a first driving circuit coupled to a first power input terminal and to a fourth input terminal configured to receive a second control clock signal, and a second driving circuit coupled to the fourth input terminal and the third node.

Abstract: An emissive display device includes: a light emitting diode; an n-type driving transistor comprising a first driving gate electrode, a first electrode receiving a driving voltage, a second electrode transferring an output current to the anode, and a second driving gate electrode; a second transistor connected to a data line; a third transistor configured to connect the first electrode and the first driving gate electrode of the driving transistor; a storage capacitor comprising a first storage electrode and a second storage electrode connected to the first driving gate electrode; a ninth transistor transferring an overlapping electrode voltage to the second driving gate electrode; an overlapping electrode voltage line crossing the data line and receiving the overlapping electrode voltage; and a shielding electrode at an intersection of the data line and the overlapping electrode voltage line and between the data line and the overlapping electrode voltage line.

Abstract: A circuit stage including a first transistor including a first electrode and a gate electrode, the first electrode being coupled to a first input terminal and the gate electrode being coupled to a second input terminal configured to receive a first clock signal, an output circuit coupled to the second input terminal and a second power input terminal, an input circuit coupled to a second electrode of the first transistor and to a third input terminal, the third input terminal being configured to receive a first control clock signal, the input circuit being configured to control voltages of the second node and a third node, a first driving circuit coupled to a first power input terminal and to a fourth input terminal configured to receive a second control clock signal, and a second driving circuit coupled to the fourth input terminal and the third node.

Abstract: A display device includes: scan, control, and emission control signal lines, signals transmitted thereby being different from one another; data and driving voltage lines; a first transistor including a first gate electrode and first source and drain; a second transistor including a second gate electrode connected to a first scan line, a second source connected to a first data line, and a second drain connected to the first source; a light-emitting element; a control transistor including a control gate electrode connected to a first control line and between the driving voltage line and the first source or the light-emitting element and the first drain; and an emission control transistor in series between the light-emitting element and the control transistor, the control transistor and the first transistor, or the driving voltage line and the control transistor, and an emission control gate electrode connected to the emission control signal line.

Abstract: A scan driver includes: a first transistor having a first electrode coupled to an output scan line, a second electrode coupled to a first power line, and a gate electrode coupled to a first node; a second transistor having a first electrode coupled to a first clock line, a second electrode coupled to the output scan line, and a gate electrode coupled to a second node; a third transistor having a first electrode coupled to the first node, a second electrode coupled to a first input scan line, and a gate electrode coupled to a second clock line; and a fourth transistor having a first electrode coupled to the second node and a second electrode and a gate electrode, which are coupled to a second input scan line, wherein the first input scan line and the second input scan line are different from each other.

Abstract: A stage and a scan driver including the same for supplying a scan signal using a stage formed of P-type transistors to prevent output of an unwanted noise in a period where the scan signal is not supplied.

Abstract: A display device includes: scan, control, and emission control signal lines, signals transmitted thereby being different from one another; data and driving voltage lines; a first transistor including a first gate electrode and first source and drain; a second transistor including a second gate electrode connected to a first scan line, a second source connected to a first data line, and a second drain connected to the first source; a light-emitting element; a control transistor including a control gate electrode connected to a first control line and between the driving voltage line and the first source or the light-emitting element and the first drain; and an emission control transistor in series between the light-emitting element and the control transistor, the control transistor and the first transistor, or the driving voltage line and the control transistor, and an emission control gate electrode connected to the emission control signal line.

Abstract: A display device includes a substrate on which an active region and a non-active region disposed are defined. The non-active region at least partially surrounds the active region. A light-emitting element is disposed in the active region on the substrate. An encapsulation layer is disposed on the light-emitting element. Block patterns are disposed in the non-active region on the substrate and at least partially surround the active region. The non-active region includes a first non-active region positioned at a first side of the active region and a second non-active region positioned at a second side of the active region. There are more block patterns disposed in the first non-active region than in the second non-active region.

Abstract: An organic light emitting display device driven at a first driving frequency or a second driving frequency lower than the first driving frequency includes pixels coupled to first scan lines, second scan lines, and data lines, a first scan driver configured to supply scan signals to the first scan lines during a first period and a second period in one frame period, when the organic light emitting display device is driven at the second driving frequency, a second scan driver configured to supply scan signals to the second scan lines during the first period, when the organic light emitting display device is driven at the second driving frequency, and a data driver configured to supply a data signal to the data lines during the first period.

Abstract: A pixel includes an organic light emitting diode, a first transistor configured to control an amount of a current flowing from a first power to a second power via a second node and the organic light emitting diode in response to a voltage of a first node, a first capacitor between the first node and a third node, a second capacitor between the second node and the third node, a second transistor between the third node and a data line and including a gate electrode coupled to a scan line, and a third transistor between the first power and the second node and including a gate electrode coupled to a first emission control line.

Abstract: An organic light emitting diode display includes a substrate, a semiconductor layer on the substrate, the semiconductor layer including a doped area and an undoped area, a first insulation layer that covers the semiconductor layer, a first conductor on the first insulation layer, a second insulation layer that covers the first conductor, a second conductor on the second insulation layer, a third insulation layer that covers the second conductor, and a third conductor on the third insulation layer, wherein, in the semiconductor layer that overlaps the first conductor, the doped area is between undoped areas.

Abstract: An organic light emitting display device driven at a first driving frequency or a second driving frequency lower than the first driving frequency includes pixels coupled to first scan lines, second scan lines, and data lines, a first scan driver configured to supply scan signals to the first scan lines during a first period and a second period in one frame period, when the organic light emitting display device is driven at the second driving frequency, a second scan driver configured to supply scan signals to the second scan lines during the first period, when the organic light emitting display device is driven at the second driving frequency, and a data driver configured to supply a data signal to the data lines during the first period.

Abstract: A stage of a scan driver for a display device, the stage includes: an output unit to output to an output terminal either a signal supplied to a first clock terminal corresponding to voltage of a first driving node or a voltage of a second power source corresponding to voltage of a second driving node; an input unit to control the voltage of the first driving node corresponding to signals supplied to a first input terminal, and the input unit to control the voltage of the second driving node corresponding to signals supplied to a second input terminal and a second clock terminal; a first signal processor including a second capacitor coupled between the second driving node and a second node, the first signal processor to control the voltage of the second driving node corresponding to signals supplied to a third clock terminal and a fourth clock terminal, the first signal processor to control a potential difference between both ends of the second capacitor corresponding to the signal supplied to the fourth clock

Abstract: An organic light emitting diode display includes a substrate, a semiconductor layer on the substrate, the semiconductor layer including a doped area and an undoped area, a first insulation layer that covers the semiconductor layer, a first conductor on the first insulation layer, a second insulation layer that covers the first conductor, a second conductor on the second insulation layer, a third insulation layer that covers the second conductor, and a third conductor on the third insulation layer, wherein, in the semiconductor layer that overlaps the first conductor, the doped area is between undoped areas.

Abstract: A display device includes: scan, control, and emission control signal lines, signals transmitted thereby being different from one another; data and driving voltage lines; a first transistor including a first gate electrode and first source and drain; a second transistor including a second gate electrode connected to a first scan line, a second source connected to a first data line, and a second drain connected to the first source; a light-emitting element; a control transistor including a control gate electrode connected to a first control line and between the driving voltage line and the first source or the light-emitting element and the first drain; and an emission control transistor in series between the light-emitting element and the control transistor, the control transistor and the first transistor, or the driving voltage line and the control transistor, and an emission control gate electrode connected to the emission control signal line.