Abstract: A soft start circuit is connected to a pulse width modulation controller including an oscillator, and a functionality of modulating amplitude to a pulse width and a power supply includes the soft start circuit. The soft start circuit includes a frequency controlling unit, a duty ratio establishing unit, and a variable switching unit. The frequency controlling unit generates first and second parameter signals for determining a frequency signal frequency by a power source from the PWM controller and provides them to the PWM controller. The duty ratio establishing unit generates a third parameter for determining amplitude of the frequency signal generated by the PWM controller according to a reference voltage, and provides it to the PWM controller. The variable switching unit determines whether it is a first predetermined time from a start-up state, and controls the first parameter of the frequency controller during the first predetermined time.

Abstract: A soft start circuit is connected to a pulse width modulation controller including an oscillator, and a functionality of modulating amplitude to a pulse width and a power supply includes the soft start circuit. The soft start circuit includes a frequency controlling unit, a duty ratio establishing unit, and a variable switching unit. The frequency controlling unit generates first and second parameter signals for determining a frequency signal frequency by a power source from the PWM controller and provides them to the PWM controller. The duty ratio establishing unit generates a third parameter for determining amplitude of the frequency signal generated by the PWM controller according to a reference voltage, and provides it to the PWM controller. The variable switching unit determines whether it is a first predetermined time from a start-up state, and controls the first parameter of the frequency controller during the first predetermined time.

Abstract: An asymmetrical DC to DC converter using one or more NAND gates. In one embodiment, an asymmetrical DC to DC converter includes a converter unit including a switching unit and adapted to transform a first voltage having a first level to a second voltage having a second level according to a switching operation of the switching unit and an output voltage control unit including at least one NAND gate and adapted to control the second level of the second voltage to be substantially uniform. The output voltage control unit is further adapted to generate a driving signal for the switching unit via the at least one NAND gate. As such, an asymmetrical control circuit that is suitable for an asymmetrical half bridge converter or an active clamp converter can be simply and inexpensively realized using a NAND gate instead of using expensive dedicated chips.