Patents by Inventor Chul-wan KIM

Chul-wan KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10522456
    Abstract: A capacitor structure includes a substrate including an electrode pad and a ground pad, a plurality of dielectric layers on the substrate, the plurality of dielectric layers being at different levels on the substrate, a plurality of conductive pattern layers in at least two dielectric layers of the plurality of dielectric layers, the at least two dielectric layers of the plurality of dielectric layers being first dielectric layers, a plurality of via plugs connecting the plurality of conductive pattern layers to each other, and at least one contact layer in at least one second dielectric layer of the plurality of dielectric layers, the at least one second dielectric layer being different from the at least two first dielectric layers, and the at least one contact layer electrically connecting the plurality of conductive pattern layers to the electrode pad and the ground pad.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: December 31, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-woo Kim, Chul-ki Kim, Chul-wan Kim, Yu-kyung Park, Gil-heyun Choi
  • Publication number: 20190051597
    Abstract: A capacitor structure includes a substrate including an electrode pad and a ground pad, a plurality of dielectric layers on the substrate, the plurality of dielectric layers being at different levels on the substrate, a plurality of conductive pattern layers in at least two dielectric layers of the plurality of dielectric layers, the at least two dielectric layers of the plurality of dielectric layers being first dielectric layers, a plurality of via plugs connecting the plurality of conductive pattern layers to each other, and at least one contact layer in at least one second dielectric layer of the plurality of dielectric layers, the at least one second dielectric layer being different from the at least two first dielectric layers, and the at least one contact layer electrically connecting the plurality of conductive pattern layers to the electrode pad and the ground pad.
    Type: Application
    Filed: April 19, 2018
    Publication date: February 14, 2019
    Inventors: Jae-woo KIM, Chul-ki KIM, Chul-wan KIM, Yu-kyung PARK, Gil-heyun CHOI