Abstract: The present invention relates to antibody-drug conjugates (ADCs) wherein a plurality of active agents are conjugated to an antibody through at least one branched linker. The branched linker may comprise a branching unit, and two active agents are coupled to the branching unit through a secondary linker and the branching unit is coupled to the antibody by a primary linker. The active agents may be the same or different. In certain such embodiments, two or more such branched linkers are conjugated to the antibody, e.g., 2-4 branched linkers, which may each be coupled to a different C-terminal cysteine of a heavy or light chain of the antibody. The branched linker may comprise one active agent coupled to the branching unit by a first branch and a second branch that comprises a polyethylene glycol moiety coupled to the branching unit. In certain such embodiments, two or more such branched linkers are conjugated to the antibody, e.g.

Abstract: Provided are a novel structure of a copolymer, a preparation method thereof, a vinyl chloride-based resin composition including the copolymer, and a coating ink including the vinyl chloride-based resin composition. According to the present invention, when the vinyl chloride-based resin composition including the copolymer is used, compatibility with ethylene vinyl acetate is excellent, and ink dispersibility and ink color are also excellent.

Abstract: Provided are a novel structure of a copolymer, a preparation method thereof, a vinyl chloride-based resin composition including the copolymer, and a coating ink including the vinyl chloride-based resin composition. According to the present invention, when the vinyl chloride-based resin composition including the copolymer is used, compatibility with ethylene vinyl acetate is excellent, and ink dispersibility and ink color are also excellent.

Abstract: Semiconductor devices and methods of fabricating the same are provided. The semiconductor devices may include gate electrodes on a substrate. A longitudinal direction of each of the gate electrodes may extend in a first direction, and ones of the gate electrodes may be arranged in the first direction. The semiconductor devices may also include first and second gate spacers extending in the first direction and on respective sidewalls of the ones of the gate electrodes. The first and second gate spacers may be spaced apart from each other in a second direction that is different from the first direction. The semiconductor devices may further include gate separation patterns, and ones of the gate separation patterns may be between two among the ones of the gate electrodes adjacent to each other in the first direction and between the first and second gate spacers.

Abstract: Semiconductor devices and methods of fabricating the same are provided. The semiconductor devices may include gate electrodes on a substrate. A longitudinal direction of each of the gate electrodes may extend in a first direction, and ones of the gate electrodes may be arranged in the first direction. The semiconductor devices may also include first and second gate spacers extending in the first direction and on respective sidewalls of the ones of the gate electrodes. The first and second gate spacers may be spaced apart from each other in a second direction that is different from the first direction. The semiconductor devices may further include gate separation patterns, and ones of the gate separation patterns may be between two among the ones of the gate electrodes adjacent to each other in the first direction and between the first and second gate spacers.

Abstract: Semiconductor devices and methods of fabricating the same are provided. The semiconductor devices may include gate electrodes on a substrate. A longitudinal direction of each of the gate electrodes may extend in a first direction, and ones of the gate electrodes may be arranged in the first direction. The semiconductor devices may also include first and second gate spacers extending in the first direction and on respective sidewalls of the ones of the gate electrodes. The first and second gate spacers may be spaced apart from each other in a second direction that is different from the first direction. The semiconductor devices may further include gate separation patterns, and ones of the gate separation patterns may be between two among the ones of the gate electrodes adjacent to each other in the first direction and between the first and second gate spacers.

Abstract: Semiconductor device, method for fabricating the same and electronic devices including the semiconductor device are provided. The semiconductor device comprises an interlayer insulating layer formed on a substrate and including a trench, a gate electrode formed in the trench, a first gate spacer formed on a side wall of the gate electrode to have an L shape, a second gate spacer formed on the first gate spacer to have an L shape and having a dielectric constant lower than that of silicon nitride, and a third spacer formed on the second gate spacer.

Abstract: Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a trench in an active region and the trench may include a notched portion of the active region. The methods may also include forming an embedded stressor in the trench. The embedded stressor may include a lower semiconductor layer and an upper semiconductor layer, which has a width narrower than a width of the lower semiconductor layer. A side of the upper semiconductor layer may not be aligned with a side of the lower semiconductor layer and an uppermost surface of the upper semiconductor layer may be higher than an uppermost surface of the active region.

Abstract: Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a fast etching region comprising phosphorous in an active region and forming a first trench in the active region by recessing the fast etching region. The methods may also include forming a second trench in the active region by enlarging the first trench using a directional etch process and forming a stressor in the second trench. The second trench may include a notched portion of the active region.

Abstract: Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a trench in an active region and the trench may include a notched portion of the active region. The methods may also include forming an embedded stressor in the trench. The embedded stressor may include a lower semiconductor layer and an upper semiconductor layer, which has a width narrower than a width of the lower semiconductor layer. A side of the upper semiconductor layer may not be aligned with a side of the lower semiconductor layer and an uppermost surface of the upper semiconductor layer may be higher than an uppermost surface of the active region.

Abstract: Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a fast etching region comprising phosphorous in an active region and forming a first trench in the active region by recessing the fast etching region. The methods may also include forming a second trench in the active region by enlarging the first trench using a directional etch process and forming a stressor in the second trench. The second trench may include a notched portion of the active region.

Abstract: Semiconductor devices and methods of fabricating the same are provided. The semiconductor devices may include gate electrodes on a substrate. A longitudinal direction of each of the gate electrodes may extend in a first direction, and ones of the gate electrodes may be arranged in the first direction. The semiconductor devices may also include first and second gate spacers extending in the first direction and on respective sidewalls of the ones of the gate electrodes. The first and second gate spacers may be spaced apart from each other in a second direction that is different from the first direction. The semiconductor devices may further include gate separation patterns, and ones of the gate separation patterns may be between two among the ones of the gate electrodes adjacent to each other in the first direction and between the first and second gate spacers.

Abstract: Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a trench in an active region and the trench may include a notched portion of the active region. The methods may also include forming an embedded stressor in the trench. The embedded stressor may include a lower semiconductor layer and an upper semiconductor layer, which has a width narrower than a width of the lower semiconductor layer. A side of the upper semiconductor layer may not be aligned with a side of the lower semiconductor layer and an uppermost surface of the upper semiconductor layer may be higher than an uppermost surface of the active region.

Abstract: Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a fast etching region comprising phosphorous in an active region and forming a first trench in the active region by recessing the fast etching region. The methods may also include forming a second trench in the active region by enlarging the first trench using a directional etch process and forming a stressor in the second trench. The second trench may include a notched portion of the active region.

Abstract: Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a fast etching region comprising phosphorous in an active region and forming a first trench in the active region by recessing the fast etching region. The methods may also include forming a second trench in the active region by enlarging the first trench using a directional etch process and forming a stressor in the second trench. The second trench may include a notched portion of the active region.

Abstract: Semiconductor device, method for fabricating the same and electronic devices including the semiconductor device are provided. The semiconductor device comprises an interlayer insulating layer formed on a substrate and including a trench, a gate electrode formed in the trench, a first gate spacer formed on a side wall of the gate electrode to have an L shape, a second gate spacer formed on the first gate spacer to have an L shape and having a dielectric constant lower than that of silicon nitride, and a third spacer formed on the second gate spacer.

Abstract: Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a fast etching region comprising phosphorous in an active region and forming a first trench in the active region by recessing the fast etching region. The methods may also include forming a second trench in the active region by enlarging the first trench using a directional etch process and forming a stressor in the second trench. The second trench may include a notched portion of the active region.

Abstract: Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a trench in an active region and the trench may include a notched portion of the active region. The methods may also include forming an embedded stressor in the trench. The embedded stressor may include a lower semiconductor layer and an upper semiconductor layer, which has a width narrower than a width of the lower semiconductor layer. A side of the upper semiconductor layer may not be aligned with a side of the lower semiconductor layer and an uppermost surface of the upper semiconductor layer may be higher than an uppermost surface of the active region.

Abstract: Semiconductor device, method for fabricating the same and electronic devices including the semiconductor device are provided. The semiconductor device comprises an interlayer insulating layer formed on a substrate and including a trench, a gate electrode formed in the trench, a first gate spacer formed on a side wall of the gate electrode to have an L shape, a second gate spacer formed on the first gate spacer to have an L shape and having a dielectric constant lower than that of silicon nitride, and a third spacer formed on the second gate spacer.

Abstract: Provided are a method and apparatus for providing and using content advisory (CA) information on Internet contents. A method of providing CA information by using a CA information server, includes receiving a request for the CA information on a content, from an Internet Protocol television (IPTV); searching for CA information on the content; and transmitting the found CA information to the IPTV. A method of using CA information when an IPTV reproduces a content not having the CA information, according to the present invention, includes transmitting a request for CA information, to a CA information server; receiving the CA information from the CA information server; analyzing the CA information; and applying the CA information.