Abstract: A touch display panel including a thin-film transistor substrate comprising a thin-film transistor, a pixel defining layer disposed on the thin-film transistor substrate and including a first opening, a light emitting structure disposed in the first opening, a thin film encapsulation layer covering the light emitting structure and the pixel defining layer, a first metal pattern disposed on the thin film encapsulation layer, a first insulation pattern disposed on the first metal pattern and having a plane area the same as or smaller than that of the first metal pattern, a second metal pattern disposed on the first insulation pattern, and a second insulation layer disposed on the second metal pattern and the thin film encapsulation layer, and contacting the first metal pattern, the first insulation pattern, and the second metal pattern.

Abstract: A touch display panel including a thin-film transistor substrate comprising a thin-film transistor, a pixel defining layer disposed on the thin-film transistor substrate and including a first opening, a light emitting structure disposed in the first opening, a thin film encapsulation layer covering the light emitting structure and the pixel defining layer, a first metal pattern disposed on the thin film encapsulation layer, a first insulation pattern disposed on the first metal pattern and having a plane area the same as or smaller than that of the first metal pattern, a second metal pattern disposed on the first insulation pattern, and a second insulation layer disposed on the second metal pattern and the thin film encapsulation layer, and contacting the first metal pattern, the first insulation pattern, and the second metal pattern.

Abstract: A touch display panel including a thin-film transistor substrate including a thin-film transistor, a pixel defining layer disposed on the thin-film transistor substrate and including a first opening, a light emitting structure disposed in the first opening, a thin film encapsulation layer covering the light emitting structure and the pixel defining layer, a first metal pattern disposed on the thin film encapsulation layer, a first insulation pattern disposed on the first metal pattern and having the same shape as the first metal pattern in a plan view, a second metal pattern disposed on the first insulation pattern, and a second insulation layer disposed on the second metal pattern and the thin film encapsulation layer and covering the first metal pattern, the first insulation pattern and the second metal pattern.

Abstract: A display panel includes a substrate, a thin-film transistor (TFT) disposed on the substrate, a first electrode electrically connected to the thin-film transistor, a roof layer disposed on the first electrode and a liquid crystal layer. The roof layer includes an organic insulating material, and defines a cavity that overlaps the first electrode. The liquid crystal layer is disposed in the cavity and is in direct contact with the roof layer.

Abstract: In a display panel, a thin film transistor is connected to a gate line and a data line, and includes a gate electrode, a semiconductor pattern, a source electrode and a drain electrode. An organic pattern makes contact with a side surface of the data line and a side surface of the thin film transistor, and the organic pattern overlaps pixel areas of the display panel. A first passivation layer is on the data line, the thin film transistor and the organic pattern. A common electrode is on the first passivation layer, and the common electrode overlaps the pixel areas. A second passivation layer covers the common electrode. A pixel electrode is on the second passivation layer, the pixel electrode overlaps the common electrode, and the pixel electrode is electrically connected to the drain electrode through a first contact hole and the data line through a second contact hole.

Abstract: A touch display panel including a thin-film transistor substrate including a thin-film transistor, a pixel defining layer disposed on the thin-film transistor substrate and including a first opening, a light emitting structure disposed in the first opening, a thin film encapsulation layer covering the light emitting structure and the pixel defining layer, a first metal pattern disposed on the thin film encapsulation layer, a first insulation pattern disposed on the first metal pattern and having the same shape as the first metal pattern in a plan view, a second metal pattern disposed on the first insulation pattern, and a second insulation layer disposed on the second metal pattern and the thin film encapsulation layer and covering the first metal pattern, the first insulation pattern and the second metal pattern.

Abstract: A complex substrate for a display apparatus, the complex substrate includes a lower base substrate including convex and concave patterns, the convex and concave patterns being integral with an upper side of the lower base substrate, a planarizing layer on the lower base substrate, the planarizing layer being integral with the convex and concave patterns, and the planarizing layer having different refractivity from the lower base substrate, and a wire grid pattern on the planarizing layer, the wire grid pattern including a plurality of nano wire metal patterns, each of the nano wire metal patterns having a width of no more than a micrometer.

Abstract: In a display panel, a thin film transistor is connected to a gate line and a data line, and includes a gate electrode, a semiconductor pattern, a source electrode and a drain electrode. An organic pattern makes contact with a side surface of the data line and a side surface of the thin film transistor, and the organic pattern overlaps pixel areas of the display panel. A first passivation layer is on the data line, the thin film transistor and the organic pattern. A common electrode is on the first passivation layer, and the common electrode overlaps the pixel areas. A second passivation layer covers the common electrode. A pixel electrode is on the second passivation layer, the pixel electrode overlaps the common electrode, and the pixel electrode is electrically connected to the drain electrode through a first contact hole and the data line through a second contact hole.

Abstract: A display panel includes a substrate, a thin-film transistor (TFT) disposed on the substrate, a first electrode electrically connected to the thin-film transistor, a roof layer disposed on the first electrode and a liquid crystal layer. The roof layer includes an organic insulating material, and defines a cavity that overlaps the first electrode. The liquid crystal layer is disposed in the cavity and is in direct contact with the roof layer.

Abstract: A display panel is provided. A plurality of thin-film transistors is disposed on a substrate. A plurality of data lines is disposed on the substrate. Each data line is connected to each thin-film transistor. A plurality of color filters is disposed on the substrate. Each color filter is disposed between two adjacent data lines. A plurality of black matrices is disposed on the substrate. Each black matrix overlaps each data line. A liquid crystal layer is disposed on the plurality of color filters. The liquid crystal layer includes a flat area having a substantially flat surface and a stepped area having a stepped height. The stepped area is adjacent to an edge of the flat area.

Abstract: A photoresist composition may include a novolac resin, a diazide-based photosensitive compound, a surfactant represented by Chemical Formula 1 below, and a solvent. R1 and R2 may denote a hydrogen atom or an alkyl group, x may be 10-50, and y may be 10-50.

Abstract: A complex substrate for a display apparatus, the complex substrate includes a lower base substrate including convex and concave patterns, the convex and concave patterns being integral with an upper side of the lower base substrate, a planarizing layer on the lower base substrate, the planarizing layer being integral with the convex and concave patterns, and the planarizing layer having different refractivity from the lower base substrate, and a wire grid pattern on the planarizing layer, the wire grid pattern including a plurality of nano wire metal patterns, each of the nano wire metal patterns having a width of no more than a micrometer.

Abstract: In a method for manufacturing a display substrate, a thin film transistor is formed on a base substrate. The thin film transistor includes a gate electrode, an active pattern, a source electrode and a drain electrode. A first passivation layer is formed to cover the thin film transistor. A second passivation layer is formed on the first passivation layer. A photoresist pattern is formed to partially expose the second passivation layer. The first passivation layer and the second passivation layer are partially removed to form a contact hole exposing the drain electrode. A pixel electrode layer is formed on the second passivation layer, the drain electrode and the photoresist pattern. A portion of the pixel electrode layer and the second photoresist pattern are removed to form a pixel electrode. The portion of the pixel electrode layer is disposed on a top surface and a sidewall of the photoresist pattern.

Abstract: A mask may include a circuit area and a pixel area. The circuit area includes a circuit pattern. The pixel area includes a pixel pattern which is extended in a length direction and an assist pattern which is at an end portion of the pixel pattern and adjacent to the circuit area.

Abstract: A photoresist composition may include a novolac resin, a diazide-based photosensitive compound, a surfactant represented by Chemical Formula 1 below, and a solvent. R1 and R2 may denote a hydrogen atom or an alkyl group, x may be 10-50, and y may be 10-50.

Abstract: In a method for manufacturing a display substrate, a thin film transistor is formed on a base substrate. The thin film transistor includes a gate electrode, an active pattern, a source electrode and a drain electrode. A first passivation layer is formed to cover the thin film transistor. A second passivation layer is formed on the first passivation layer. A photoresist pattern is formed to partially expose the second passivation layer. The first passivation layer and the second passivation layer are partially removed to form a contact hole exposing the drain electrode. A pixel electrode layer is formed on the second passivation layer, the drain electrode and the photoresist pattern. A portion of the pixel electrode layer and the second photoresist pattern are removed to form a pixel electrode. The portion of the pixel electrode layer is disposed on a top surface and a sidewall of the photoresist pattern.

Abstract: A method of forming a metal pattern is disclosed. In the method, a metal layer is formed on a base substrate. A photoresist composition is coated on the metal layer to form a coating layer. The photoresist composition includes a binder resin, a photo-sensitizer, a mercaptopropionic acid compound and a solvent. The coating layer is exposed to a light. The coating layer is partially removed to form a photoresist pattern. The metal layer is patterned by using the photoresist pattern as a mask.

Abstract: A method of forming a metal pattern is disclosed. In the method, a metal layer is formed on a base substrate. A photoresist composition is coated on the metal layer to form a coating layer. The photoresist composition includes a binder resin, a photo-sensitizer, a mercaptopropionic acid compound and a solvent. The coating layer is exposed to a light. The coating layer is partially removed to form a photoresist pattern. The metal layer is patterned by using the photoresist pattern as a mask.

Abstract: A mask may include a circuit area and a pixel area. The circuit area includes a circuit pattern. The pixel area includes a pixel pattern which is extended in a length direction and an assist pattern which is at an end portion of the pixel pattern and adjacent to the circuit area.