Patents by Inventor Chun C. Kuo

Chun C. Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240112916
    Abstract: Techniques are provided herein to form semiconductor devices that include a gate cut formed after the formation of source/drain contacts. In an example, a semiconductor device includes a gate structure around or otherwise on a semiconductor region that extends from a source region to a drain region. Conductive contacts formed over the source and drain regions along a source/drain trench. The gate structure may be interrupted with a dielectric gate cut that further extends past the gate trench and into the source/drain trench where it can cut into one or more of the contacts. The contacts are formed before the gate cut to ensure complete fill of conductive material when forming the contacts. Accordingly, a liner structure on the conductive contacts is also broken by the intrusion of the gate cut and does not extend further up or down the sidewalls of the gate cut.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Applicant: Intel Corporation
    Inventors: Swapnadip Ghosh, Matthew J. Prince, Alison V. Davis, Chun C. Kuo, Andrew Arnold, Reza Bayati
  • Publication number: 20240105452
    Abstract: Techniques are provided to form semiconductor devices that include one or more gate cuts having a layer of polymer material at edges of the gate cut. The polymer layer may be provided as a byproduct of the etching process used to form the gate cut recess through the gate structure, and can protect any exposed portions of the source or drain regions from certain subsequent processes. The gate structure may be interrupted between two transistors with a gate cut that extends through an entire thickness of the gate structure and includes a dielectric material to electrically isolate the portions of the gate structure on either side of the gate cut. The edges of the gate cut may be lined with a polymer layer that is also on any exposed portions of the source or drain regions that were exposed during the etching process used to form the gate cut recess.
    Type: Application
    Filed: September 26, 2022
    Publication date: March 28, 2024
    Applicant: Intel Corporation
    Inventors: Reza Bayati, Matthew J. Prince, Alison V. Davis, Chun C. Kuo, Andrew Arnold, Ramy Ghostine, Li Huey Tan