Patents by Inventor Chun Chao FEI

Chun Chao FEI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11335648
    Abstract: A method for fabricating a semiconductor structure is provided. The method includes forming a semiconductor chip; providing a printed circuit board; and forming an adhesive layer between a connection surface of the semiconductor chip and the printed circuit board to bond the semiconductor chip with the printed circuit board. The semiconductor chip includes a plurality of cutting tracks intersected with each other to enclose an area having corner regions. The connection surface of the semiconductor chip includes a plurality of conductive bumps and a plurality of first openings are formed in each of the corner regions.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: May 17, 2022
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Li Hui Lu, Chun Chao Fei, Po Yuan Chiang, Ya Ping Wang
  • Patent number: 10950525
    Abstract: Method for fabricating A packaging structure is provided. The packaging structure includes a base substrate including a solder pad body region and a trench region adjacent to and around the solder pad body region. The packaging structure includes a passivation layer on the base substrate and exposing the solder pad body region and the trench region. The packaging structure includes a main body solder pad on the solder pad body region of the base substrate, and one or more trenches on the trench region of the base substrate and between the passivation layer and the main body solder pad. The packaging structure includes a bonding conductive wire having one end connected to the main body solder pad.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: March 16, 2021
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Li Zhong Jin, Li Hui Lu, Chun Chao Fei, Po Yuan Chiang, Ya Ping Wang
  • Publication number: 20200098704
    Abstract: A method for fabricating a semiconductor structure is provided. The method includes forming a semiconductor chip; providing a printed circuit board; and forming an adhesive layer between a connection surface of the semiconductor chip and the printed circuit board to bond the semiconductor chip with the printed circuit board. The semiconductor chip includes a plurality of cutting tracks intersected with each other to enclose an area having corner regions. The connection surface of the semiconductor chip includes a plurality of conductive bumps and a plurality of first openings are formed in each of the corner regions.
    Type: Application
    Filed: November 27, 2019
    Publication date: March 26, 2020
    Inventors: Li Hui LU, Chun Chao FEI, Po Yuan CHIANG, Ya Ping WANG
  • Patent number: 10522479
    Abstract: A method for fabricating a semiconductor structure includes forming a semiconductor chip. Forming the semiconductor chip includes providing a substrate, forming a connection layer on the substrate, and forming a first passivation layer on the substrate. The first passivation layer contains a plurality of first openings to expose the connection layer. Forming the semiconductor chip also includes forming a plurality of second openings and a plurality of third openings in the second passivation layer. Each second opening is formed in a first opening to expose the connection layer, and each third opening is formed outside of the plurality of first openings to expose the first passivation layer. Further, forming the semiconductor chip includes forming a conductive bump in each second opening.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: December 31, 2019
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Li Hui Lu, Chun Chao Fei, Po Yuan Chiang, Ya Ping Wang
  • Publication number: 20190393134
    Abstract: Method for fabricating A packaging structure is provided. The packaging structure includes a base substrate including a solder pad body region and a trench region adjacent to and around the solder pad body region. The packaging structure includes a passivation layer on the base substrate and exposing the solder pad body region and the trench region. The packaging structure includes a main body solder pad on the solder pad body region of the base substrate, and one or more trenches on the trench region of the base substrate and between the passivation layer and the main body solder pad. The packaging structure includes a bonding conductive wire having one end connected to the main body solder pad.
    Type: Application
    Filed: September 3, 2019
    Publication date: December 26, 2019
    Inventors: Li Zhong JIN, Li Hui LU, Chun Chao FEI, Po Yuan CHIANG, Ya Ping WANG
  • Patent number: 10446474
    Abstract: A packaging structure and a method for fabricating the packaging structure are provided. The packaging structure includes a base substrate including a solder pad body region and a trench region adjacent to and around the solder pad body region. The packaging structure also includes a passivation layer on a surface of the base substrate and exposing the solder pad body region and the trench region. In addition, the packaging structure includes a main body solder pad on the solder pad body region of the base substrate, and one or more trenches on the trench region of the base substrate and between the passivation layer and the main body solder pad. Further, the packaging structure includes a bonding conductive wire having one end connected to the main body solder pad.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: October 15, 2019
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Li Zhong Jin, Li Hui Lu, Chun Chao Fei, Po Yuan Chiang, Ya Ping Wang
  • Publication number: 20180337143
    Abstract: A method for fabricating a semiconductor structure includes forming a semiconductor chip. Forming the semiconductor chip includes providing a substrate, forming a connection layer on the substrate, and forming a first passivation layer on the substrate. The first passivation layer contains a plurality of first openings to expose the connection layer. Forming the semiconductor chip also includes forming a plurality of second openings and a plurality of third openings in the second passivation layer. Each second opening is formed in a first opening to expose the connection layer, and each third opening is formed outside of the plurality of first openings to expose the first passivation layer. Further, forming the semiconductor chip includes forming a conductive bump in each second opening.
    Type: Application
    Filed: May 21, 2018
    Publication date: November 22, 2018
    Inventors: Li Hui LU, Chun Chao FEI, Po Yuan CHIANG, Ya Ping WANG
  • Publication number: 20180182690
    Abstract: A packaging structure and a method for fabricating the packaging structure are provided. The packaging structure includes a base substrate including a solder pad body region and a trench region adjacent to and around the solder pad body region. The packaging structure also includes a passivation layer on a surface of the base substrate and exposing the solder pad body region and the trench region. In addition, the packaging structure includes a main body solder pad on the solder pad body region of the base substrate, and one or more trenches on the trench region of the base substrate and between the passivation layer and the main body solder pad. Further, the packaging structure includes a bonding conductive wire having one end connected to the main body solder pad.
    Type: Application
    Filed: December 21, 2017
    Publication date: June 28, 2018
    Inventors: Li Zhong JIN, Li Hui LU, Chun Chao FEI, Po Yuan CHIANG, Ya Ping WANG