Patents by Inventor Chun-Cheng Chang
Chun-Cheng Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240124844Abstract: The present disclosure provides a method for preparing a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors, the composition prepared by the method, and use of the composition for treating arthritis. The composition of the present disclosure achieves the effect of treating arthritis through various efficacy experiments.Type: ApplicationFiled: October 4, 2023Publication date: April 18, 2024Inventors: Chia-Hsin Lee, Po-Cheng Lin, Yong-Cheng Kao, Ming-Hsi Chuang, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
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Publication number: 20240128375Abstract: A method includes forming first and second semiconductor fins and a gate structure over a substrate; forming a first and second source/drain epitaxy structures over the first and second semiconductor fins; forming an interlayer dielectric (ILD) layer over the first and second source/drain epitaxy structures; etching the gate structure and the ILD layer to form a trench; performing a first surface treatment to modify surfaces of a top portion and a bottom portion of the trench to NH-terminated; performing a second surface treatment to modify the surfaces of the top portion of the trench to N-terminated, while leaving the surfaces of the bottom portion of the trench being NH-terminated; and depositing a first dielectric layer in the trench, wherein the first dielectric layer has a higher deposition rate on the surfaces of the bottom portion of the trench than on the surfaces of the bottom portion of the trench.Type: ApplicationFiled: March 16, 2023Publication date: April 18, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chun-Yi CHANG, Yu Ying CHEN, Zhen-Cheng WU, Chi On CHUI
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Patent number: 11961892Abstract: A semiconductor device and methods of forming the same are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions, a channel between the first and second S/D regions, a gate engaging the channel, and a contact feature connecting to the first S/D region. The contact feature includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S/D region on at least two sides thereof. In embodiments, the first contact layer is in direct contact with three or four sides of the first S/D region so as to increase the contact area. The first contact layer includes one of a semiconductor-metal alloy, an III-V semiconductor, and germanium.Type: GrantFiled: June 10, 2022Date of Patent: April 16, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Carlos H. Diaz, Chung-Cheng Wu, Chia-Hao Chang, Chih-Hao Wang, Jean-Pierre Colinge, Chun-Hsiung Lin, Wai-Yi Lien, Ying-Keung Leung
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Patent number: 11955191Abstract: A memory device and a method of operating a memory device are disclosed. In one aspect, the memory device includes a plurality of non-volatile memory cells, each of the plurality of non-volatile memory cells is operatively coupled to a word line, a gate control line, and a bit line. Each of the plurality of non-volatile memory cells comprises a first transistor, a second transistor, a first diode-connected transistor, and a capacitor. The first transistor, second transistor, first diode-connected transistor are coupled in series, with the capacitor having a first terminal connected to a common node between the first diode-connected transistor and the second transistor.Type: GrantFiled: June 2, 2023Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Perng-Fei Yuh, Tung-Cheng Chang, Gu-Huan Li, Chia-En Huang, Chun-Ying Lee, Yih Wang
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Publication number: 20240102154Abstract: A vacuum processing apparatus (110) for deposition of a material on a substrate is provided. The vacuum processing apparatus (110) includes a vacuum chamber comprising a processing area (111); a deposition apparatus (112) within the processing area (111) of the vacuum chamber; a cooling surface (113) inside the vacuum chamber; and one or more movable shields (220) between the cooling surface (113) and the processing area (111).Type: ApplicationFiled: February 24, 2020Publication date: March 28, 2024Inventors: Chun Cheng CHEN, Hung-Wen CHANG, Shin-Hung LIN, Chi-Chang YANG, Christoph MUNDORF, Thomas GEBELE, Jürgen GRILLMAYER
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Patent number: 11942543Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.Type: GrantFiled: June 29, 2022Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
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Patent number: 11942322Abstract: In a method of manufacturing a semiconductor device, a metallic photoresist layer is formed over a target layer to be patterned, the metallic photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern. The metallic photo resist layer is an alloy layer of two or more metal elements, and the selective exposure changes a phase of the alloy layer.Type: GrantFiled: April 9, 2021Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: An-Ren Zi, Chun-Chih Ho, Yahru Cheng, Ching-Yu Chang
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Patent number: 11942380Abstract: A method includes forming a dummy pattern over test region of a substrate; forming an interlayer dielectric (ILD) layer laterally surrounding the dummy pattern; removing the dummy pattern to form an opening; forming a dielectric layer in the opening; performing a first testing process on the dielectric layer; performing an annealing process to the dielectric layer; and performing a second testing process on the annealed dielectric layer.Type: GrantFiled: October 26, 2020Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ming-Shiang Lin, Chia-Cheng Ho, Chun-Chieh Lu, Cheng-Yi Peng, Chih-Sheng Chang
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Patent number: 11929417Abstract: A semiconductor device and methods of forming the same are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions, a channel between the first and second S/D regions, a gate engaging the channel, and a contact feature connecting to the first S/D region. The contact feature includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S/D region on at least two sides thereof. In embodiments, the first contact layer is in direct contact with three or four sides of the first S/D region so as to increase the contact area. The first contact layer includes one of a semiconductor-metal alloy, an III-V semiconductor, and germanium.Type: GrantFiled: June 30, 2022Date of Patent: March 12, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Carlos H. Diaz, Chung-Cheng Wu, Chia-Hao Chang, Chih-Hao Wang, Jean-Pierre Colinge, Chun-Hsiung Lin, Wai-Yi Lien, Ying-Keung Leung
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Patent number: 11926901Abstract: A method for fabricating nonenzymatic glucose sensor, which comprises steps of: (a) providing a bottom substrate; (b) preparing a graphene layer on the bottom substrate; (c) depositing plural amount of zinc oxide (ZnO) seed crystals on the graphene layer; (d) growing the ZnO seed crystals into columnar nanorods with hydrothermal method; (e) coating a thin film of cuprous oxide (Cu2O) on the surface of the ZnO nanorods by electrochemistry-based electrodeposition; and (f) grafting single-walled carbon nanotubes (SWCNTs) on surface of the Cu2O thin film, by using Nafion fixative composited with SWCNTs. The structure of the above sensor, therefore, comprises a bottom substrate and other components orderly assembled on it, including, from inside to outside, a graphene layer, plural amount of ZnO nanorods, a Cu2O thin film, plural amount of SWCNTs, and the Nafion fixative. Accordingly, the sensor has advantages of low cost, rapid response, and easy for preservation.Type: GrantFiled: January 10, 2020Date of Patent: March 12, 2024Assignee: NATIONAL YUNLIN UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Hsi-Chao Chen, Wei-Rong Su, Yun-Cheng Yeh, Chun-Hao Chang
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Patent number: 11924965Abstract: A package component and forming method thereof are provided. The package component includes a substrate and a conductive layer. The substrate includes a first surface. The conductive layer is disposed over the first surface. The conductive layer includes a first conductive feature and a second conductive feature. The second conductive feature covers a portion of the first conductive feature. A resistance of the second conductive feature is lower than a resistance of the first conductive feature.Type: GrantFiled: April 25, 2022Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chun-Wei Chang, Jian-Hong Lin, Shu-Yuan Ku, Wei-Cheng Liu, Yinlung Lu, Jun He
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Publication number: 20240071981Abstract: A method of fabricating a semiconductor structure includes the following steps. A semiconductor wafer is provided. A plurality of first surface mount components and a plurality of second surface mount components are bonded onto the semiconductor wafer, wherein a first portion of each of the second surface mount components is overhanging a periphery of the semiconductor wafer. A first barrier structure is formed in between the second surface mount components and the semiconductor wafer. An underfill structure is formed under a second portion of each of the second surface mount components, wherein the first barrier structure blocks the spreading of the underfill structure from the second portion to the first portion.Type: ApplicationFiled: November 1, 2023Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Mao-Yen Chang, Chih-Wei Lin, Hao-Yi Tsai, Kuo-Lung Pan, Chun-Cheng Lin, Tin-Hao Kuo, Yu-Chia Lai, Chih-Hsuan Tai
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Publication number: 20240029969Abstract: A key structure is applicable to an electronic device having a housing. The key structure includes a seat, a switch, a button, and an elastic sheet. The seat is disposed in the housing and has a first through hole. The switch is disposed on the seat. A key pillar of the button passes through the first through hole to abut against the switch. The elastic sheet includes a body, and a plurality of first elastic arms, second elastic arms and third elastic arms. The first elastic arms extending from the body are abutting against the housing. The second elastic arms extending from an inner edge of the second through hole are engaged with the key pillar. The third elastic arms abutting against the keycap are configured to support the button and provide a restoring force that can restore the button from a pressed position to an initial position.Type: ApplicationFiled: May 22, 2023Publication date: January 25, 2024Inventors: TA-YUNG HSU, CHUN-CHENG CHANG
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Patent number: 9716780Abstract: A telephone device is disclosed. The telephone device has a base, a magnetic field generating device, an ear set, a magnetic sensor and a controller. The base has an ear set accommodating area. The magnetic field generating device situates with the base and generates a magnetic field. The ear set detachably connects with the base. The ear set has a magnetic conducted element. The magnetic sensor situates with the base for detecting the magnetic field. The magnetic field detected by the magnetic sensor is reduced due to interference of the magnetic conducted element when the ear set situates at the ear set accommodating area. The controller electronically connects with the magnetic sensor and determines whether the eat set is situated in the ear set accommodating area based on the change of the magnetic field detected by the magnetic sensor.Type: GrantFiled: August 16, 2016Date of Patent: July 25, 2017Assignee: Pegatron CorporationInventors: Fen-Ming Yang, Chun-Cheng Chang, Wei-Chun Hung
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Publication number: 20170134544Abstract: A telephone device is disclosed. The telephone device has a base, a magnetic field generating device, an ear set, a magnetic sensor and a controller. The base has an ear set accommodating area. The magnetic field generating device situates with the base and generates a magnetic field. The ear set detachably connects with the base. The ear set has a magnetic conducted element. The magnetic sensor situates with the base for detecting the magnetic field. The magnetic field detected by the magnetic sensor is reduced due to interference of the magnetic conducted element when the ear set situates at the ear set accommodating area. The controller electronically connects with the magnetic sensor and determines whether the eat set is situated in the ear set accommodating area based on the change of the magnetic field detected by the magnetic sensor.Type: ApplicationFiled: August 16, 2016Publication date: May 11, 2017Inventors: FEN-MING YANG, CHUN-CHENG CHANG, WEI-CHUN HUNG
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Patent number: 9620597Abstract: A graphene optoelectronic detector is disclosed, which comprises: an insulating substrate with a graphene layer disposed thereon; a first electrode disposed on the graphene layer or between the graphene layer and the insulating substrate; and a second electrode disposed on the graphene layer or between the graphene layer and the insulating substrate, wherein there is a predetermined distance between the first electrode and the second electrode, and the first electrode and the second electrode are at different electrical potentials, wherein a high-drift carrier moving region is disposed between the first electrode and the second electrode, and a low-drift carrier moving region is disposed outside the high-drift carrier moving region. In addition, the present invention further provides a method for detecting photons and electromagnetic energy using the aforementioned graphene detector.Type: GrantFiled: June 26, 2015Date of Patent: April 11, 2017Assignee: NATIONAL CHENG KUNG UNIVERSITYInventors: Yon-Hua Tzeng, Chun-Cheng Chang, Pin-Yi Li, Yueh-Chieh Chu
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Publication number: 20160190257Abstract: A graphene optoelectronic detector is disclosed, which comprises: an insulating substrate with a graphene layer disposed thereon; a first electrode disposed on the graphene layer or between the graphene layer and the insulating substrate; and a second electrode disposed on the graphene layer or between the graphene layer and the insulating substrate, wherein there is a predetermined distance between the first electrode and the second electrode, and the first electrode and the second electrode are at different electrical potentials, wherein a high-drift carrier moving region is disposed between the first electrode and the second electrode, and a low-drift carrier moving region is disposed outside the high-drift carrier moving region. In addition, the present invention further provides a method for detecting photons and electromagnetic energy using the aforementioned graphene detector.Type: ApplicationFiled: June 26, 2015Publication date: June 30, 2016Inventors: YON-HUA TZENG, CHUN-CHENG CHANG, PIN-YI LI, YUEH-CHIEH CHU
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Publication number: 20120181714Abstract: Disclosed herein is a method for manufacturing a master plate of an optical disc. The method comprises the step of: (a) forming an inorganic resist layer on a substrate; (b) forming an organic photoresist layer on and in contact with the inorganic resist layer; (c) irradiating both the organic photoresist layer and the inorganic resist layer with a laser beam to form a first exposed region of the inorganic resist layer and a second exposed region of the organic photoresist layer; (d) removing the inorganic resist layer of the first exposed region and the organic photoresist layer of the second exposed region; (e) removing the patterned organic photoresist layer from the patterned inorganic resist layer; (f) conformally forming a release layer to cover the patterned inorganic resist layer; (g) plating a metal layer on the release layer; and (h) separating the metal layer and the release layer.Type: ApplicationFiled: January 14, 2011Publication date: July 19, 2012Applicant: RITEK CORPORATIONInventor: Chun-Cheng Chang
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Publication number: 20120156625Abstract: Disclosed herein is a nano-fabrication method, which includes the step of: (a) forming an inorganic resist layer on a substrate; (b) forming an organic photoresist layer on the inorganic resist layer; (c) irradiating both the organic photoresist layer and the inorganic resist layer with a laser beam to form a first exposed region of the inorganic resist layer and a second exposed region of the organic photoresist layer; (d) removing the inorganic resist layer of the first exposed region and the organic photoresist layer of the second exposed region to form a patterned inorganic resist layer and a patterned organic photoresist layer; and (e) removing the patterned organic photoresist layer from the patterned inorganic resist layer.Type: ApplicationFiled: December 21, 2010Publication date: June 21, 2012Applicant: RITEK CORPORATIONInventor: Chun-Cheng Chang
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Patent number: 7885159Abstract: The method prevents an optical disk from being scraped by an optical apparatus of a pickup head of an optical disc drive is disclosed, it mainly includes: moving the optical apparatus of the pickup head to a detection position in which the laser-light emitted from the pickup head focuses on the optical disk; detecting the first-detection position and setting a movement boundary according to the first-detection position, wherein the movement boundary has a upper boundary and a bottom boundary; preventing the optical apparatus from moving out of the movement boundary. The present method can be implemented without installing any additional apparatus in the original video disc player, and can prevent the optical disk and the inner apparatus of the optical disc drive from being scraped or damaged by the pickup head during a read/write process to increase the service life of the optical disk and the optical disc drive.Type: GrantFiled: August 18, 2008Date of Patent: February 8, 2011Assignee: Lite-On It CorporationInventors: Song-Ruei Chen, Chih-Chang Cheu, Rong-Son Jeng, Chun-Cheng Chang, Chung-Ming Chen