Patents by Inventor Chun-Cheng Huang

Chun-Cheng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973117
    Abstract: Methods of forming contacts for source/drain regions and a contact plug for a gate stack of a finFET device are disclosed herein. Methods include etching a contact opening through a dielectric layer to expose surfaces of a first source/drain contact and repairing silicon oxide structures along sidewall surfaces of the contact opening and along planar surfaces of the dielectric layer to prevent selective loss defects from occurring during a subsequent selective deposition of conductive fill materials and during subsequent etching of other contact openings. The methods further include performing a selective bottom-up deposition of conductive fill material to form a second source/drain contact. According to some of the methods, once the second source/drain contact has been formed, the contact plug may be formed over the gate stack.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsien Huang, Chang-Ting Chung, Wei-Cheng Lin, Wei-Jung Lin, Chih-Wei Chang
  • Publication number: 20240133467
    Abstract: A waterproof click pad device includes a click pad, a frame and a waterproof unit. The frame surrounds the click pad and surrounds an axis passing through the click pad. The waterproof unit is transverse to the axis and is in sheet form. The waterproof unit includes a frame adhesive member surrounding the axis and adhered to the frame, a first non-adhesive member surrounding the axis, connected to an inner periphery of the frame adhesive member and spaced apart from and located above the frame, a second non-adhesive member surrounding the axis, connected to an inner periphery of the first non-adhesive member and spaced apart from and located above the click pad and the frame, and an plate adhesive member connected to an inner periphery of the second non-adhesive member and adhered to the click pad.
    Type: Application
    Filed: January 4, 2023
    Publication date: April 25, 2024
    Applicant: SUNREX TECHNOLOGY CORP.
    Inventors: Yu-Xiang GENG, Chun-Chieh CHEN, Ling-Cheng TSENG, Yi-Wen TSAI, Ching-Yao HUANG
  • Publication number: 20240120402
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a first dielectric feature extending along a first direction, the first dielectric feature comprising a first dielectric layer having a first sidewall and a second sidewall opposing the first sidewall, a first semiconductor layer disposed adjacent the first sidewall, the first semiconductor layer extending along a second direction perpendicular to the first direction, a second dielectric feature extending along the first direction, the second dielectric feature disposed adjacent the first semiconductor layer, and a first gate electrode layer surrounding at least three surfaces of the first semiconductor layer, and a portion of the first gate electrode layer is exposed to a first air gap.
    Type: Application
    Filed: November 19, 2023
    Publication date: April 11, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jia-Ni YU, Kuo-Cheng CHIANG, Mao-Lin HUANG, Lung-Kun CHU, Chung-Wei HSU, Chun-Fu LU, Chih-Hao WANG, Kuan-Lun CHENG
  • Patent number: 11955191
    Abstract: A memory device and a method of operating a memory device are disclosed. In one aspect, the memory device includes a plurality of non-volatile memory cells, each of the plurality of non-volatile memory cells is operatively coupled to a word line, a gate control line, and a bit line. Each of the plurality of non-volatile memory cells comprises a first transistor, a second transistor, a first diode-connected transistor, and a capacitor. The first transistor, second transistor, first diode-connected transistor are coupled in series, with the capacitor having a first terminal connected to a common node between the first diode-connected transistor and the second transistor.
    Type: Grant
    Filed: June 2, 2023
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Perng-Fei Yuh, Tung-Cheng Chang, Gu-Huan Li, Chia-En Huang, Chun-Ying Lee, Yih Wang
  • Publication number: 20240113195
    Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures formed over a substrate, and a dielectric wall adjacent to the first nanostructures. The semiconductor structure also includes a first liner layer between the first nanostructures and the dielectric wall, and the first liner layer is in direct contact with the dielectric wall. The semiconductor structure also includes a gate structure surrounding the first nanostructures, and the first liner layer is in direct contact with a portion of the gate structure.
    Type: Application
    Filed: February 22, 2023
    Publication date: April 4, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jia-Ni YU, Lung-Kun CHU, Chun-Fu LU, Chung-Wei HSU, Mao-Lin HUANG, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Publication number: 20240114614
    Abstract: Disclosed is a thermal conduction-electrical conduction isolated circuit board with a ceramic substrate and a power transistor embedded, mainly comprising: a dielectric material layer, a heat-dissipating ceramic block, a securing portion, a stepped metal electrode layer, a power transistor, and a dielectric material packaging, wherein a via hole is formed in the dielectric material layer, the heat-dissipating ceramic block is correspondingly embedded in the via hole, the heat-dissipating ceramic block has a thermal conductivity higher than that of the dielectric material layer and a thickness less than that of the dielectric material layer, the stepped metal electrode layer conducts electricity and heat for the power transistor, the dielectric material packaging is configured to partially expose the source connecting pin, drain connecting pin, and gate connecting pin of the encapsulated stepped metal electrode layer.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Inventors: HO-CHIEH YU, CHEN-CHENG-LUNG LIAO, CHUN-YU LIN, JASON AN CHENG HUANG, CHIH-CHUAN LIANG, KUN-TZU CHEN, NAI-HIS HU, LIANG-YO CHEN
  • Publication number: 20240094774
    Abstract: A foldable electronic apparatus is provided and includes a base unit and a display unit. The display unit includes a main panel body having a first side and a bottom side substantially perpendicular to each other, and the bottom side is connected to the base unit; a first folding module disposed on the first side; a first side panel body disposed on the first folding module, and the first side panel body is able to transform between a first unfolded state and a first folded state relative to the main panel body with the first folding module as an axis; and a flexible screen disposed on the main panel body, the first folding module and the first side panel body, and the flexible screen includes a first bendable area corresponding to the first folding module.
    Type: Application
    Filed: August 22, 2023
    Publication date: March 21, 2024
    Applicant: SYNCMOLD ENTERPRISE CORP.
    Inventors: Ching-Hui YEN, Chun-Hao HUANG, Chien-Cheng YEH
  • Publication number: 20240096994
    Abstract: A method for forming a semiconductor device is provided. The method includes forming a plurality of first channel nanostructures and a plurality of second channel nanostructures in an n-type device region and a p-type device region of a substrate, respectively, and sequentially depositing a gate dielectric layer, an n-type work function metal layer, and a cap layer surrounding each of the first and second channel nanostructures. The cap layer merges in first spaces between adjacent first channel nanostructures and merges in second spaces between adjacent second channel nanostructures. The method further includes selectively removing the cap layer and the n-type work function metal layer in the p-type device region, and depositing a p-type work function metal layer over the cap layer in the n-type device region and the gate dielectric layer in the p-type device region. The p-type work function metal layer merges in the second spaces.
    Type: Application
    Filed: February 10, 2023
    Publication date: March 21, 2024
    Inventors: Lung-Kun CHU, Jia-Ni YU, Chun-Fu LU, Mao-Lin HUANG, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Publication number: 20240080382
    Abstract: A foldable electronic device is provided and includes a central base, a torque module, two wing members, two transmission members, two panel bodies, two connecting rods, two drop plates, a synchronous module and a flexible screen. The torque module is disposed on the central base, the wing members pivot relative to the central base, the transmission members are pivotally connected to the torque module and the central base, the panel bodies pivot relative to the wing members and linearly slide relative to the transmission members, the connecting rods pivot relative to the wing members, the drop plates pivot relative to the panel bodies and the connecting rods, the synchronous module drives the transmission members to reverse synchronously, and the flexible screen is arranged on the panel bodies, the drop plates and the wing members and includes a bendable area.
    Type: Application
    Filed: April 25, 2023
    Publication date: March 7, 2024
    Applicant: SYNCMOLD ENTERPRISE CORP.
    Inventors: Chun-Hao Huang, Chien-Cheng Yeh
  • Publication number: 20240081005
    Abstract: A flexible screen comprises a multi-layer display structure and a covering structure. The multi-layer display structure includes an outer surface and an inner surface opposite to the outer surface, and the inner surface faces towards the foldable electronic device. The covering structure is disposed on the outer surface of the multi-layer display structure and includes a substrate layer and a plurality of nano-protrusions. The nano-protrusions are formed in array on at least one side of the substrate layer. The flexible screen can transform between an unfolded state and a folded state, and a bending section is partially formed when the flexible screen is in the folded state. The nano-protrusions located in the bending section can release the stress generated in the bending section when the flexible screen transform between the unfolded state and the folded state.
    Type: Application
    Filed: May 30, 2023
    Publication date: March 7, 2024
    Inventors: Chun-Hao HUANG, Ching-Hui YEN, Chien-Cheng YEH
  • Patent number: 11916084
    Abstract: A transparent display panel with driving electrode regions, circuit wiring regions, and optically transparent regions is provided. The driving electrode regions are arranged into an array in a first direction and a second direction. An average light transmittance of the circuit wiring regions is less than ten percent, and an average light transmittance of the optically transparent regions is greater than that of the driving electrode regions and the circuit wiring regions. The first direction intersects the second direction. The circuit wiring regions connect the driving electrode regions at intervals, such that each optically transparent region spans among part of the driving electrode regions. The transparent display panel includes first signal lines and second signal lines extending along the circuit wiring regions, and each circuit wiring region is provided with at least one of the first signal lines and at least one of the second signal lines.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: February 27, 2024
    Assignee: AUO Corporation
    Inventors: Chun-Yu Lin, Kun-Cheng Tien, Jia-Long Wu, Ming-Lung Chen, Shu-Hao Huang
  • Patent number: 11508060
    Abstract: A computer aided method for analyzing fibrosis is provided. First, a segmentation algorithm is performed on a medical image to obtain a segmentation image. Circular fibrosis is detected according to the segmentation image to determine a score. In some cases, it is also necessary to determine a number of fibrosis bridges and the condition of fiber expansion.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: November 22, 2022
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Pau-Choo Chung Chan, Nan-Haw Chow, Hung-Wen Tsai, Kuo-Sheng Cheng, Chun-Cheng Huang
  • Patent number: 10596609
    Abstract: An springback compensation method for on-line real-time metal sheet roll bending includes the steps of using multiple rollers to bend a continuous metal sheet of multiple sections having different materials or different thickness respectively; using a first position sensor to individually measure springback angles of the multiple sections of the bent metal sheet, and feeding back to a programmable logic controller; using the programmable controller to control a bending roller to compensate the multiple sections of the bent metal sheet respectively; using a second position sensor to individually measure compensated angles of the multiple sections of the bent metal sheet; and comparing a difference between the compensated angles and standard angles of the multiple sections of the bent metal sheet after compensating bending.
    Type: Grant
    Filed: December 11, 2016
    Date of Patent: March 24, 2020
    Assignee: METAL INDUSTRIES RESEARCH & DEVELOPMENT CENTRE
    Inventors: Chun-Cheng Huang, Chien-Sin Huang, Chien-Hung Huang
  • Publication number: 20200065965
    Abstract: A computer aided method for analyzing fibrosis is provided. First, a segmentation algorithm is performed on a medical image to obtain a segmentation image. Circular fibrosis is detected according to the segmentation image to determine a score. In some cases, it is also necessary to determine a number of fibrosis bridges and the condition of fiber expansion.
    Type: Application
    Filed: August 26, 2019
    Publication date: February 27, 2020
    Inventors: Pau-Choo CHUNG CHAN, Nan-Haw CHOW, Hung-Wen TSAI, Kuo-Sheng CHENG, Chun-Cheng HUANG
  • Publication number: 20180117653
    Abstract: An springback compensation method for on-line real-time metal sheet roll bending includes the steps of using multiple rollers to bend a continuous metal sheet of multiple sections having different materials or different thickness respectively; using a first position sensor to individually measure springback angles of the multiple sections of the bent metal sheet, and feeding back to a programmable logic controller; using the programmable controller to control a bending roller to compensate the multiple sections of the bent metal sheet respectively; using a second position sensor to individually measure compensated angles of the multiple sections of the bent metal sheet; and comparing a difference between the compensated angles and standard angles of the multiple sections of the bent metal sheet after compensating bending.
    Type: Application
    Filed: December 11, 2016
    Publication date: May 3, 2018
    Inventors: Chun-Cheng HUANG, Chien-Sin HUANG, Chien-Hung HUANG
  • Publication number: 20150049263
    Abstract: A touch display device including a touch panel, a protection layer, a conductive optical adhesive layer and a display panel is provided. The touch panel includes a substrate, pads, at least one grounding pad, a touch-sensing device, and at least one ESD protection line. The touch panel includes a pad area and an active area. The pads and the grounding pad are disposed on the substrate and located in the pad area. The touch-sensing device is disposed on the substrate and located in the active area. The ESD protection line is disposed on the substrate and located at a side of the active area. The protection layer including a first opening covers the touch panel and a portion of the pad area is exposed by the first opening. The conductive optical adhesive layer is disposed on the protection layer and electrically connected to the ESD protection circuit.
    Type: Application
    Filed: August 14, 2014
    Publication date: February 19, 2015
    Applicant: WINTEK CORPORATION
    Inventors: Kuan-Yu Chu, Chen-Fu Huang, Chin-Pei Hwang, Ming-Wu Chen, Chun-Cheng Huang, Yu-Ching Wang
  • Publication number: 20140300835
    Abstract: A touch panel, having a light transmission touch sensing region and a peripheral region adjacent to at least one side of the light transmission touch sensing region, includes an inner frame and a decoration frame disposed in the peripheral region. The peripheral region has an inner edge and an outer edge, wherein the inner edge is closer to the light transmission touch sensing region than the outer edge. The inner sidewall of the inner frame is disposed along the inner edge of the peripheral region. The decoration frame includes at least one decoration layer. The pattern of the decoration layer does not exceed the inner edge of the peripheral region.
    Type: Application
    Filed: April 3, 2014
    Publication date: October 9, 2014
    Applicant: WINTEK CORPORATION
    Inventors: Kuan-Yu Chu, Yu-Ching Wang, Chin-Pei Hwang, Ming-Wu Chen, Chin-Yi Hsu, Chun-Cheng Huang, Chen-Fu Huang, Yi-Chun Lin, Ming-Kung Wu, Ta-Wei Yeh
  • Publication number: 20140226086
    Abstract: Touch panel having electrostatic protection is provided. The touch panel includes a substrate, a plurality of sensing electrodes, a plurality of conductive wires and an electrostatic protection line. The substrate has a touch sensitive area and a periphery area surrounding the touch sensitive area. The inner part of the periphery area is a first layout area. The outer part of the periphery area is a second layout area. The sensing electrodes are formed in the touch sensitive area. The conductive wires are disposed in the first layout area. The electrostatic protection line is disposed in the second layout area and adjacent to the conductive wires. The width of the electrostatic protection line is greater than that of the conductive wires. The distance separating the outside of the electrostatic protection line from the border of the substrate is smaller than 48.12 mm and greater than or equal to 0.3 mm.
    Type: Application
    Filed: February 7, 2014
    Publication date: August 14, 2014
    Applicants: WINTEK CORPORATION, Wintek (China) Technology Ltd.
    Inventors: Kuan-Yu Chu, Chun-Cheng Huang, Chiu-Mei Liu, Ming-Wu Chen, Chin-Pei Hwang, Chen-Fu Huang, Yu-Ching Wang
  • Publication number: 20140184950
    Abstract: A touch panel, having a peripheral region, includes a first substrate, a touch-sensing structure, first outer traces, a first ground wire and an outer device. The first outer trace is electrically connected to the touch-sensing structure. The first outer traces extend to a connection region in the peripheral region. The first ground wire extends to the connection region, and the first ground wire has at least one discontinuous section in the connection region. The outer device is electrically connected to the first ground wire and the first outer traces in the connection region. The outer device electrically connects two ends of the discontinuous section of the first ground wire in the connection region, and the two ends of the discontinuous section of the first ground wire are electrically connected via the outer device.
    Type: Application
    Filed: December 26, 2013
    Publication date: July 3, 2014
    Applicant: WINTEK CORPORATION
    Inventors: Kuan-Yu Chu, Chun-Cheng Huang, Chen-Fu Huang, Yu-Ching Wang, Chin-Pei Hwang, Ming-Wu Chen, Chiu-Mei Liu, Yan-Jun Lin, Chia-Hung Liu, Wen-Chun Wang, Yu-Hung Chang, Lo-Hsien Tsai
  • Publication number: 20140184952
    Abstract: A touch panel, having a peripheral region, includes a first substrate, a plurality of first conductive series, a plurality of first outer traces, and an outer device. The first conductive series are disposed on the first substrate and extend along a first direction. The first outer traces are disposed in the peripheral region. Two ends of each of the first outer traces are respectively connected to two ends of the corresponding first conductive series. The first outer traces connected to the each of the first conductive series extend to a connection region within the peripheral region and include discontinuous sections within the connection region. The outer device is disposed in the peripheral region and is electrically connected to the first outer traces. Each of the first outer traces, each corresponding first conductive series, and the outer device in the connection region constitute a closed conductive path on the first substrate.
    Type: Application
    Filed: December 27, 2013
    Publication date: July 3, 2014
    Applicant: WINTEK CORPORATION
    Inventors: Kuan-Yu Chu, Chun-Cheng Huang, Chen-Fu Huang, Yu-Ching Wang, Chin-Pei Hwang, Ming-Wu Chen, Chiu-Mei Liu, Yan-Jun Lin, Chia-Hung Liu