Patents by Inventor Chun-Cheng Lin

Chun-Cheng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12278208
    Abstract: A method of fabricating a semiconductor structure includes the following steps. A semiconductor wafer is provided. A plurality of first surface mount components and a plurality of second surface mount components are bonded onto the semiconductor wafer, wherein a first portion of each of the second surface mount components is overhanging a periphery of the semiconductor wafer. A first barrier structure is formed in between the second surface mount components and the semiconductor wafer. An underfill structure is formed under a second portion of each of the second surface mount components, wherein the first barrier structure blocks the spreading of the underfill structure from the second portion to the first portion.
    Type: Grant
    Filed: November 1, 2023
    Date of Patent: April 15, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mao-Yen Chang, Chih-Wei Lin, Hao-Yi Tsai, Kuo-Lung Pan, Chun-Cheng Lin, Tin-Hao Kuo, Yu-Chia Lai, Chih-Hsuan Tai
  • Publication number: 20240405442
    Abstract: A corner reflecting device has at least one corner reflector. The reflector has a first right triangle plate, a second right triangle plate and a first isosceles right triangle plate, and a shape of the first right triangle plate is the same as a shape of the second right triangle plate, and is not an isosceles right triangle plate. A long leg of the second right triangle plate is connected with a long leg of the first right triangle plate. Two legs of the first isosceles right triangle plate are connected with a short leg of the first right triangle plate and a short leg of the second right triangle plate respectively. An intersection of the first right triangle plate, the second right triangle plate, and the first isosceles right triangle plate forms a leak hole.
    Type: Application
    Filed: January 24, 2024
    Publication date: December 5, 2024
    Inventors: CHIH-CHUNG CHUNG, CHUN-CHENG LIN
  • Patent number: 12149024
    Abstract: An electrical connector assembly including a first connector and a second connector to be mated with each other is provided. The first connector includes a first body, and at least one first terminal and multiple second terminals disposed therein. The second terminals are symmetrically arranged at opposite sides of the first terminal. The second connector includes a second body, at least one third terminal movably disposed in the second body, multiple fourth terminals disposed in the second body and symmetrically arranged at opposite sides of the third terminal, and a driving module electrically connected to at least one of the fourth terminals and structurally connected to the third terminal. In the mating process of the first and second connector, the second terminals and the fourth terminals are electrically connected firstly, to trigger the driving module to move the third terminal to be structurally and electrically connected to the first terminal.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: November 19, 2024
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Chun-Cheng Lin, Shy-Luen Chern, Chih-Hsiang Tang, Hong-Wen Lee
  • Publication number: 20240355691
    Abstract: A semiconductor package including a circuit substrate, an interposer structure, a plurality of dies, and an insulating encapsulant is provided. The interposer structure is disposed on the circuit substrate. The plurality of dies is disposed on the interposer structure, wherein the plurality of dies is electrically connected to the circuit substrate through the interposer structure. The insulating encapsulant is disposed on the circuit substrate, wherein the insulating encapsulant surrounds the plurality of dies and the interposer structure and encapsulates at least the interposer structure, the insulating encapsulant has a groove that surrounds the interposer structure and the plurality of dies, and the interposer structure and the plurality of dies are confined to be located within the groove.
    Type: Application
    Filed: July 1, 2024
    Publication date: October 24, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Cheng Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu, Chih-Wei Lin
  • Publication number: 20240349445
    Abstract: A flexible orientation rack cabinet includes a top panel, a bottom panel, first and second edge panels, a first and second flexible mounting flanges. The top panel includes a first U-space adjustment portion. The bottom panel includes a second U-space adjustment portion. The first flexible mounting flange is in physical communication with the first edge panel and includes a third U-space adjustment portion. The second flexible mounting flange is in physical communication with the second edge panel and includes a fourth U-space adjustment portion. The flexible orientation rack cabinet is in a first orientation when multiple first server rails are attached to the first and second U-space adjustment portions.
    Type: Application
    Filed: April 17, 2023
    Publication date: October 17, 2024
    Inventors: Chun-Cheng Lin, Yueh-Chun Tsai, Yu-Lin Chen
  • Patent number: 12057359
    Abstract: A semiconductor package including a circuit substrate, an interposer structure, a plurality of dies, and an insulating encapsulant is provided. The interposer structure is disposed on the circuit substrate. The plurality of dies is disposed on the interposer structure, wherein the plurality of dies is electrically connected to the circuit substrate through the interposer structure. The insulating encapsulant is disposed on the circuit substrate, wherein the insulating encapsulant surrounds the plurality of dies and the interposer structure and encapsulates at least the interposer structure, the insulating encapsulant has a groove that surrounds the interposer structure and the plurality of dies, and the interposer structure and the plurality of dies are confined to be located within the groove.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: August 6, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Cheng Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu, Chih-Wei Lin
  • Patent number: 12016167
    Abstract: A carrier assembly for mounting equipment into a carrier slot includes an electro-magnetic interference (EMI) shield and an EMI finger. The EMI shield protects the mounted equipment from EMI. The EMI shield is formed in a first plane of the carrier assembly. The EMI finger protrudes from the EMI shield and is coupled to the EMI shield. The EMI finger is formed in a second plane perpendicular to the first plane. The EMI finger operates, when the carrier assembly is installed into the carrier slot, to couple the EMI shield to the carrier slot. The EMI finger, when viewed from a first direction that is perpendicular to both the first plane and the second plane, is formed in a tear-drop shape.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: June 18, 2024
    Assignee: Dell Products L.P.
    Inventors: Yu-Lin Chen, Yueh-Chun Tsai, Chun-Cheng Lin, Chi-Feng Lee
  • Patent number: 11940388
    Abstract: Example methods are provided to improve placement of an adaptor (210,220) to a mobile computing device (100) to measure a test strip (221) coupled to the adaptor (220) with a camera (104) and a screen (108) on a face of the mobile computing device (100). The method may include displaying a light area on a first portion of the screen (108). The first portion may be adjacent to the camera (104). The light area and the camera (104) may be aligned with a key area of the test strip (221) so that the camera (104) is configured to capture an image of the key area. The method may further include providing first guiding information for a user to place the adaptor (210,220) to the mobile computing device (100) according to a position of the light area on the screen (108).
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: March 26, 2024
    Assignee: IXENSOR CO., LTD.
    Inventors: Yenyu Chen, An Cheng Chang, Tai I Chen, Su Tung Yang, Chih Jung Hsu, Chun Cheng Lin, Min Han Wang, Shih Hao Chiu
  • Publication number: 20240071981
    Abstract: A method of fabricating a semiconductor structure includes the following steps. A semiconductor wafer is provided. A plurality of first surface mount components and a plurality of second surface mount components are bonded onto the semiconductor wafer, wherein a first portion of each of the second surface mount components is overhanging a periphery of the semiconductor wafer. A first barrier structure is formed in between the second surface mount components and the semiconductor wafer. An underfill structure is formed under a second portion of each of the second surface mount components, wherein the first barrier structure blocks the spreading of the underfill structure from the second portion to the first portion.
    Type: Application
    Filed: November 1, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mao-Yen Chang, Chih-Wei Lin, Hao-Yi Tsai, Kuo-Lung Pan, Chun-Cheng Lin, Tin-Hao Kuo, Yu-Chia Lai, Chih-Hsuan Tai
  • Publication number: 20240047446
    Abstract: A semiconductor package and a manufacturing method thereof are described. The semiconductor package includes a package having dies encapsulated by an encapsulant, a redistribution circuit structure, first and second modules and affixing blocks. The redistribution circuit structure is disposed on the package. The first and second modules are disposed on and respectively electrically connected to the redistribution circuit structure by first and second connectors disposed there-between. The first and second modules are adjacent to each other and disposed side by side on the redistribution circuit structure. The affixing blocks are disposed on the redistribution circuit structure and between the first and second modules and the redistribution circuit structure. The affixing blocks include first footing portions located below the first module, second footing portions located below the second module, and exposed portions exposed from the first and second modules.
    Type: Application
    Filed: August 8, 2022
    Publication date: February 8, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mao-Yen Chang, Chun-Cheng Lin, Chih-Wei Lin, Yi-Da Tsai, Hsaing-Pin Kuan, Chih-Chiang Tsao, Hsuan-Ting Kuo, Hsiu-Jen Lin, Yu-Chia Lai, Kuo-Lung Pan, Hao-Yi Tsai, Ching-Hua Hsieh
  • Patent number: 11848300
    Abstract: A semiconductor structure includes a semiconductor wafer, a first surface mount component, a second surface mount component and a first barrier structure. The first surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of first electrical connectors. The second surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of second electrical connectors, wherein an edge of the second surface mount component is overhanging a periphery of the semiconductor wafer. The first barrier structure is disposed on the semiconductor wafer in between the second electrical connectors and the edge of the second surface mount component, wherein a first surface of the first barrier structure is facing the second electrical connectors, and a second surface of the first barrier structure is facing away from the second electrical connectors.
    Type: Grant
    Filed: July 3, 2022
    Date of Patent: December 19, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mao-Yen Chang, Chih-Wei Lin, Hao-Yi Tsai, Kuo-Lung Pan, Chun-Cheng Lin, Tin-Hao Kuo, Yu-Chia Lai, Chih-Hsuan Tai
  • Publication number: 20230346304
    Abstract: The present invention provides a method for OSA (Obstructive Sleep Apnea) severity detection using recording-based electrocardiography (ECG) Signal. The major feature of the present invention emphasizes on using a recording-based ECG Signal as an input, which is different from the deep learning-based prior art of using segment-based signals as an input to a model, and the segment-based signals has only two classification results, i.e. normal or apnea. The present invention provides a method for a model to detect and output directly a value of apnea-hypopnea index (AHI) for the OSA Severity.
    Type: Application
    Filed: April 29, 2022
    Publication date: November 2, 2023
    Inventors: Sin Horng Chen, Cheng Yu Yeh, Chun Cheng Lin, Shaw Hwa Hwang, Yuan Fu Liao, Yih Ru Wang, Kuan Chun Hsu, You Shuo Chen, Yao Hsing Chung, Yen Chun Huang, Chi Jung Huang, Li Te Shen, Bing Chih Yao, Ning Yun Ku
  • Publication number: 20230346302
    Abstract: The present invention provides a method for OSA (Obstructive Sleep Apnea) severity classification by using recording-based Peripheral Oxygen Saturation Signal. The major feature of the present invention emphasizes on using a recording-based Peripheral Oxygen Saturation Signal (SpO2 signal) as an input, which is different from the deep learning-based prior art of using segment-based signals as an input to a model, and the segment-based signals has only two classification results, i.e. normal or apnea.
    Type: Application
    Filed: April 29, 2022
    Publication date: November 2, 2023
    Inventors: Sin Horng Chen, Cheng Yu Yeh, Chun Cheng Lin, Shaw Hwa Hwang, Yuan Fu Liao, Yih Ru Wang, Kai Yang Qiu, You Shuo Chen, Yao Hsing Chung, Yen Chun Huang, Chi Jung Huang, Li Te Shen, Bing Chih Yao, Ning Yun Ku
  • Publication number: 20230328941
    Abstract: A carrier assembly for mounting equipment into a carrier slot includes an electro-magnetic interference (EMI) shield and an EMI finger. The EMI shield protects the mounted equipment from EMI. The EMI shield is formed in a first plane of the carrier assembly. The EMI finger protrudes from the EMI shield and is coupled to the EMI shield. The EMI finger is formed in a second plane perpendicular to the first plane. The EMI finger operates, when the carrier assembly is installed into the carrier slot, to couple the EMI shield to the carrier slot. The EMI finger, when viewed from a first direction that is perpendicular to both the first plane and the second plane, is formed in a tear-drop shape.
    Type: Application
    Filed: April 11, 2022
    Publication date: October 12, 2023
    Inventors: Yu-Lin Chen, Yueh-Chun Tsai, Chun-Cheng Lin, Chi-Feng Lee
  • Publication number: 20230200647
    Abstract: A method for transmitting compressed brainwave physiological signals is provided and including detecting a plurality of brainwave physiological signals of a subject, and generating an electroencephalography based on a time sequence of the plurality of brainwave physiological signals; splitting the electroencephalography into a plurality of sub-images based on the time sequence; using a plurality of static feature tags and a plurality of dynamic displacement tags stored in a brainwave database to identify at least one static feature tag and a plurality of associated dynamic displacement tags based on the time sequence according to the plurality of sub-images; generating at least one superimposed group tag, the superposed group tag is used to integrate the identified static feature tag and the associated dynamic displacement tag according to the time sequence; and transmitting the identified static feature tag, the associated dynamic displacement tag, and the superimposed group tag to a remote cloud system acco
    Type: Application
    Filed: August 23, 2022
    Publication date: June 29, 2023
    Inventors: Shu-Chun Kuan, Jason Chun-Cheng Lin, Chin-Yeh Lu
  • Publication number: 20230200697
    Abstract: An automatic evolution method used for a brainwave database which collects physiological information of brainwaves about healthy and clinical groups, the automatic evolution method includes: classifying the physiological information of brainwaves collected by the brainwave database according to data characteristics; establishing a feedback algorithm model based on a neural network architecture according to the physiological information of brainwaves classified by the parameters; using the feedback algorithm model to input a subject's physiological information of brainwaves; measuring an accuracy of the subsequent performance data calculated by the feedback algorithm model; and incorporating the physiological information of brainwaves of the subject into the brainwave database, establishing an updated feedback algorithm model based on an updated neural network architecture, and feeding a comparison result generated by the updated feedback algorithm model back to the subject.
    Type: Application
    Filed: August 12, 2022
    Publication date: June 29, 2023
    Inventors: Shu-Chun Kuan, Jason Chun-Cheng Lin, Chin-Yeh Lu
  • Publication number: 20230130742
    Abstract: Provided is a method for long-distance transmission of physiological signals in a closed loop system, including generating a signal at a user terminal of the closed loop system, compressing the signal to generate a compressed signal, transmitting the compressed signal from the user terminal to a computing terminal of the closed loop system, receiving and comparing the compressed signal with a database at the computing terminal to generate a comparison result and a feedback signal, and transmitting the feedback signal from the computing terminal to the user terminal. A time interval between generating the signal and receiving the feedback signal at the user terminal is less than a threshold.
    Type: Application
    Filed: July 25, 2022
    Publication date: April 27, 2023
    Inventors: Shu-Chun Kuan, Jason Chun-Cheng Lin, Chin-Yeh Lu
  • Publication number: 20230093921
    Abstract: The invention provides an oriented and covalent method for immobilizing a glycoprotein and an antibody on a chip. The method includes providing a silver-coated solid surface equipped with alkynes and cuprous oxide nanoparticles. The azido boronic acid tosyl probe is conjugated to the silver-coated solid surface by the cuprous oxide nanoparticles through the self-catalyzed azide-alkyne cycloaddition reaction. The glycan(s) of a glycoprotein or an antibody is provided to the boronic acid tosyl probe, and alcohol groups of the glycan(s) of the glycoprotein or the antibody and the boronic acid group of boronic acid tosyl probe form boronate ester. The nucleophilic residues on the glycoprotein or the antibody replace the tosyl group by SN2 reaction, so as to immobilize the glycoprotein or the antibody through the covalent bond formation.
    Type: Application
    Filed: January 6, 2022
    Publication date: March 30, 2023
    Applicant: National Tsing Hua University
    Inventors: Chun-Cheng Lin, Avijit K. Adak, Chen-Yu Fan
  • Publication number: 20230023998
    Abstract: An electrical connector assembly including a first connector and a second connector to be mated with each other is provided. The first connector includes a first body, and at least one first terminal and multiple second terminals disposed therein. The second terminals are symmetrically arranged at opposite sides of the first terminal. The second connector includes a second body, at least one third terminal movably disposed in the second body, multiple fourth terminals disposed in the second body and symmetrically arranged at opposite sides of the third terminal, and a driving module electrically connected to at least one of the fourth terminals and structurally connected to the third terminal. In the mating process of the first and second connector, the second terminals and the fourth terminals are electrically connected firstly, to trigger the driving module to move the third terminal to be structurally and electrically connected to the first terminal.
    Type: Application
    Filed: June 29, 2022
    Publication date: January 26, 2023
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Chun-Cheng Lin, Shy-Luen Chern, Chih-Hsiang Tang, Hong-Wen Lee
  • Publication number: 20230017588
    Abstract: A local wearable brain wave cap device for detection is provided to simultaneously detect brainwave and heart rate variability data of a subject and includes a brain wave detection cap, at least one ear electrode and a transmission unit. The brain wave detection cap includes a wearable device and a plurality of electrode units. The wearable device is suitable for arranging the plurality of electrode units on brain wave positions corresponding to head of a subject. Each of the plurality of electrode units includes an accelerator, a storage unit, an input/output unit and a primary amplifier for detecting a brain wave.
    Type: Application
    Filed: October 6, 2021
    Publication date: January 19, 2023
    Inventors: Shu-Chun Kuan, Jason Chun-Cheng Lin, Chung-Tse Shen