Abstract: Example devices, methods, and computer-readable media are disclosed for decoding video data. An example method includes determining to decode a current block of the video data using a merge mode. The example method includes obtaining a flag from a bitstream. The example method includes determining, based on a value of the flag, to use a second merge list of two merge lists for the current block, wherein the second merge list is based on a first merge list of the two merge lists. The example method includes decoding the current block based on the second merge list.

Abstract: Example devices, methods, and computer-readable media for decoding video data are described. An example method includes determining to decode a current block of the video data using a merge mode. The example method includes generating a first merge list for the current block, wherein generating the first merge list comprises applying template matching to candidates of the first merge list. The example method includes generating, based on the first merge list, a second merge list. The example method includes decoding the current block using the merge mode and based on the first merge list or the second merge list.

Abstract: Example devices, methods, and computer-readable media are described. An example method includes determining to decode a current block of the video data using a merge mode. The example method includes determining, for the current block, to apply local illumination compensation (LIC). The example method includes determining, for the current block, to apply decoder side motion vector refinement (DMVR). The example method includes decoding the current block based on applying LIC and applying DMVR.

Abstract: A method includes forming a bonding structure that contains thermal conductive vias (also termed as thermal vias, thermal conductive pillars, or thermal pillars) on a semiconductor structure. The thermal vias, with material thermal conductivity greater than about 10 W/m·K, are embedded in the bonding structure that provides a quick dissipation path of heat from thermal hotspot regions into a substrate.

Abstract: A semiconductor structure includes a source/drain (S/D) region, one or more dielectric layers over the S/D region, one or more semiconductor channel layers connected to the S/D region, an isolation structure under the S/D region and the one or more semiconductor channel layers, and a via under the S/D region and electrically connected to the S/D region. A lower portion of the via is surrounded by the isolation structure and an upper portion of the via extends vertically between the S/D region and the isolation structure.

Abstract: A semiconductor structure includes an isolation structure, a source/drain region over the isolation structure, a gate structure over the isolation structure and adjacent to the source/drain region, an interconnect layer over the source/drain region and the gate structure, an isolating layer below the gate structure, and a contact structure under the source/drain region. The contact structure has a first portion and a second portion. The first portion is below the second portion. The second portion extends through the isolating layer and protrudes above the isolating layer. A portion of the isolating layer is vertically between the gate structure and the first portion of the contact structure.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a stack of semiconductor nanostructures over a base structure and a first epitaxial structure and a second epitaxial structure sandwiching the semiconductor nanostructures. The semiconductor device structure also includes a gate stack wrapped around each of the semiconductor nanostructures and a backside conductive contact connected to the second epitaxial structure. A first portion of the backside conductive contact is directly below the base structure, and a second portion of the backside conductive contact extends upwards to approach a bottom surface of the second epitaxial structure. The semiconductor device structure further includes an insulating spacer between a sidewall of the base structure and the backside conductive contact.

Abstract: A semiconductor manufacturing system includes: a nozzle including a first channel that allows a fluid to flow through; a light source configured to emit light; and a light sensor configured to receive light, the light source and the light sensor being disposed within the first channel and opposite to each other. The semiconductor manufacturing system is configured to: emit light, by the light source, from within the nozzle toward a surface while the nozzle is dispensing the fluid; receive the light reflected from the surface by the light sensor, the emitted light and the reflected light adapted to be contained within the fluid; and examine a status of the reflected light. The emitted light and the reflected light propagate in a direction parallel to a longitudinal axis of the first channel.

Abstract: A signal transporting system, comprising: a signal transporting circuit, configured to receive an input signal to generate an output signal; and a signal timing adjusting circuit, configured to adjust an output timing of the output signal according to a signal pattern of the input signal.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.

Abstract: A video encoder and video decoder may determine to enable or disable a template-based inter prediction technique based on whether reference picture resampling or weighted prediction are used. A video encoder and video decoder may determine that a reference picture resampling mode is enabled. determine not to apply a template-based inter prediction technique to the video data based on the reference picture resampling mode being enabled, and code the video data using inter prediction without applying the template-based inter prediction technique.

Abstract: The present disclosure provides a smart pole charging system and a monitoring method. The database system initiates a configuration according to an original environmental status. The charging module is connected with an electric vehicle and provides the electrical energy to the electric vehicle. The monitoring module monitors a real-time environmental status around corresponding smart pole. The calculating module recognizes the real-time environmental status and outputs a calculation result. The router receives the calculation result. The cloud platform is communicated with the router and the database system. The router transmits the calculation result to the cloud platform through an open charge point protocol.

Abstract: An electronic package module and a method for fabrication of the same are provided. The method includes providing an electronic component assembly and a circuit substrate. The electronic component assembly includes two electronic components and a conductive structure. The electronic components are connected to each other through a conductive adhesive material, while the electronic components are connected to the conductive structure through another conductive adhesive material. A soldering material is formed on the circuit substrate, and the electronic component assembly is disposed on the soldering material. The melting points of the conductive adhesive materials are higher than the melting point of the soldering material. As a result, the conductive adhesive materials are prevented from failure during the soldering process, and thus the process yield is improved.

Abstract: A fault diagnosis method applied to an optical tunnel network system (OPTUNS) having multiple optical switches and multiple optical fibers connected to the multiple optical switches is disclosed and includes following steps: detecting whether the multiple tunnels of the OPTUNS include a faulty tunnel, where each tunnel respectively passes through multiple component parts; when the faulty tunnel is detected, querying the multiple component parts that are passed through by the tunnels within a certain range with the faulty tunnel; respectively calculating a faulty count of each component part queried, where the faulty count indicates the quantity that the component parts being passed through by the faulty tunnels; and outputting one or more of the component parts that have the faulty count of non-zero.

Abstract: An example device for decoding video data includes a memory configured to store video data; and one or more processors configured to: decode data representing an initial motion vector for a current block of the video data, the initial motion vector having integer-motion vector difference (MVD) precision; determine a search range around a reference area identified by the initial motion vector in a reference picture; perform a template matching search process in the search range to identify a best matching region; determine error values for neighboring pixels to the best matching region; use the error values for the neighboring pixels to perform a model-based fractional-pixel motion vector refinement to derive motion vector difference values; apply at least one of the motion vector difference values to the initial motion vector to determine a refined motion vector for the current block; and decode the current block using the refined motion vector.

Abstract: A display may include an array of pixels such as light-emitting diode pixels. The pixels may include multiple circuitry decks that each include one or more circuit components such as transistors, capacitors, and/or resistors. The circuitry decks may be vertically stacked. Each circuitry deck may include a planarization layer formed from a siloxane material that conforms to underlying components and provides a planar upper surface. In this way, circuitry components may be vertically stacked to mitigate the size of each pixel footprint. The circuitry components may include capacitors that include both a high-k dielectric layer and a low-k dielectric layer. The display pixel may include a via with a width of less than 1 micron.

Abstract: An integrated circuit includes a substrate at a front side of the integrated circuit. A first gate all around transistor is disposed on the substrate. The first gate all around transistor includes a channel region including at least one semiconductor nanostructure, source/drain regions arranged at opposite sides of the channel region, and a gate electrode. A shallow trench isolation region extends into the integrated circuit from the backside. A backside gate plug extends into the integrated circuit from the backside and contacts the gate electrode of the first gate all around transistor. The backside gate plug laterally contacts the shallow trench isolation region at the backside of the integrated circuit.

Abstract: A video decoder may be configured to receive a block of video data that was encoded using a coding mode that includes a search process in one or more reference frames. The video decoder may prefetch reference samples in a fixed search region of at least one reference frame of the one or more reference frames, and decode the block of video data using the coding mode, including performing the search process for the coding mode using the prefetched reference samples.

Abstract: A semiconductor structure has a frontside and a backside. The semiconductor structure includes an isolation structure at the backside; one or more transistors at the frontside, wherein the one or more transistors have source/drain epitaxial features; two metal plugs through the isolation structure and contacting two of the source/drain electrodes from the backside; and a dielectric liner filling a space between the two metal plugs, wherein the dielectric liner partially or fully surrounds an air gap between the two metal plugs.

Abstract: A video decoder may be configured to receive a block of video data that was encoded using a coding mode that includes a search process in one or more reference frames. The video decoder may prefetch reference samples in a fixed search region of at least one reference frame of the one or more reference frames, and decode the block of video data using the coding mode, including performing the search process for the coding mode using the prefetched reference samples.