Patents by Inventor Chun-Chi Huang

Chun-Chi Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145653
    Abstract: A manufacturing method of a display device includes forming light emitting components on a first substrate, the light emitting components include a first side and a second side, and the second side is away from the first substrate; forming a circuit layer on the first substrate and on the second side of the light emitting components; forming a first protective layer on the circuit layer and forming an insulating layer on the first protective layer; removing the first substrate after forming a second substrate on the insulating layer; forming a black matrix layer on the first side of the light emitting components, and the black matrix layer includes openings; forming light conversion layers in the openings of the black matrix layer; forming a second protective layer on the black matrix layer and the light conversion layers; and forming a third substrate on the second protective layer.
    Type: Application
    Filed: May 12, 2023
    Publication date: May 2, 2024
    Applicant: HANNSTAR DISPLAY CORPORATION
    Inventors: Chun-I Chu, Yu-Chi Chiao, Yung-Li Huang, Hung-Ming Chang, Cheng-Yu Lin, Huan-Hsun Hsieh, CHeng-Pei Huang
  • Patent number: 11964358
    Abstract: A method includes placing a polisher head on platen, the polisher head including a set of first magnets, and controlling a set of second magnets to rotate the polisher head on the platen, wherein controlling the set of second magnets includes reversing the polarity of at least one second magnet of the set of second magnets to produce a magnetic force on at least one first magnet of the set of first magnets, wherein the set of second magnets are external to the polisher head.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Yu Wang, Chun-Hao Kung, Ching-Hsiang Tsai, Kei-Wei Chen, Hui-Chi Huang
  • Patent number: 11960253
    Abstract: A system and a method for parameter optimization with adaptive search space and a user interface using the same are provided. The system includes a data acquisition unit, an adaptive adjustment unit and an optimization search unit. The data acquisition unit obtains a set of executed values of several operating parameters and a target parameter. The adaptive adjustment unit includes a parameter space transformer and a search range definer. The parameter space transformer performs a space transformation on a parameter space of the operating parameters according to the executed values. The search range definer defines a parameter search range in a transformed parameter space based on the sets of the executed values. The optimization search unit takes the parameter search range as a limiting condition and takes optimizing the target parameter as a target to search for a set of recommended values of the operating parameters.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: April 16, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Po-Yu Huang, Chun-Fang Chen, Hong-Chi Ku, Te-Ming Chen, Chien-Liang Lai, Sen-Chia Chang
  • Patent number: 11937932
    Abstract: An acute kidney injury predicting system and a method thereof are proposed. A processor reads the data to be tested, the detection data, the machine learning algorithm and the risk probability comparison table from a main memory. The processor trains the detection data according to the machine learning algorithm to generate an acute kidney injury prediction model, and inputs the data to be tested into the acute kidney injury prediction model to generate an acute kidney injury characteristic risk probability and a data sequence table. The data sequence table lists the data to be tested in sequence according to a proportion of each of the data to be tested in the acute kidney injury characteristics. The processor selects one of the medical treatment data from the risk probability comparison table according to the acute kidney injury characteristic risk probability.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: March 26, 2024
    Assignees: TAICHUNG VETERANS GENERAL HOSPITAL, TUNGHAI UNIVERSITY
    Inventors: Chieh-Liang Wu, Chun-Te Huang, Cheng-Hsu Chen, Tsai-Jung Wang, Kai-Chih Pai, Chun-Ming Lai, Min-Shian Wang, Ruey-Kai Sheu, Lun-Chi Chen, Yan-Nan Lin, Chien-Lun Liao, Ta-Chun Hung, Chien-Chung Huang, Chia-Tien Hsu, Shang-Feng Tsai
  • Patent number: 11939603
    Abstract: A modified cutinase is disclosed. The cutinase has the modified amino acid sequence of SEQ ID NO: 2, wherein the modification is a substitution of asparagine at position 181 with alanine, or substitutions of asparagine at position 181 with alanine and phenylalanine at position 235 with leucine. The modified enzyme has improved PET-hydrolytic activity, and thus, the high-activity PET hydrolase is obtained, and the industrial application value of the PET hydrolase is enhanced.
    Type: Grant
    Filed: June 21, 2023
    Date of Patent: March 26, 2024
    Assignee: HUBEI UNIVERSITY
    Inventors: Chun-Chi Chen, Jian-Wen Huang, Jian Min, Xian Li, Beilei Shi, Panpan Shen, Yu Yang, Yumei Hu, Longhai Dai, Lilan Zhang, Yunyun Yang, Rey-Ting Guo
  • Publication number: 20240096285
    Abstract: A display may include an array of pixels. A pixel can include an organic light-emitting diode, up to three thin-film transistors, and up to two capacitors. The pixel can include a drive transistor, an emission transistor, and a select transistor. The select transistor can be used to apply a reference voltage to the gate of the drive transistor during a global reset phase and during a global threshold voltage sampling phase and can also be used to apply a data voltage to the gate of the drive transistor during a data programming phase. The drive transistor can receive a power supply voltage that toggles between a low voltage during the global reset phase and a high voltage during other phases of operation. Configured and operated in this way, the pixel need not include separate dedicated anode reset and initialization transistors.
    Type: Application
    Filed: July 25, 2023
    Publication date: March 21, 2024
    Inventors: Alper Ozgurluk, Andrew Lin, Cheuk Chi Lo, Chun-Ming Tang, Shinya Ono, Chun-Yao Huang
  • Publication number: 20240087951
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Chun-Hao Kung, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
  • Publication number: 20240079493
    Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a gate structure disposed on the substrate. The semiconductor device also includes a source region and a drain region disposed within the substrate. The substrate includes a drift region laterally extending between the source region and the drain region. The semiconductor device further includes a first stressor layer disposed over the drift region of the substrate. The first stressor layer is configured to apply a first stress to the drift region of the substrate. In addition, the semiconductor device includes a second stressor layer disposed on the first stressor layer. The second stressor layer is configured to apply a second stress to the drift region of the substrate, and the first stress is opposite to the second stress.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Inventors: GUAN-QI CHEN, CHEN CHI HSIAO, KUN-TSANG CHUANG, FANG YI LIAO, YU SHAN HUNG, CHUN-CHIA CHEN, YU-SHAN HUANG, TUNG-I LIN
  • Publication number: 20240072158
    Abstract: A method of forming a FinFET is disclosed. The method includes depositing a conductive material across each of a number of adjacent fins, depositing a sacrificial mask over the conductive material, patterning the conductive material with the sacrificial mask to form a plurality of conductive material segments, depositing a sacrificial layer over the sacrificial mask, and patterning the sacrificial layer, where a portion of the patterned sacrificial layer remains over the sacrificial mask, where a portion of the sacrificial mask is exposed, and where the exposed portion of the sacrificial mask extends across each of the adjacent fins. The method also includes removing the portion of the sacrificial layer over the sacrificial mask, after removing the portion of the sacrificial layer over the sacrificial mask, removing the sacrificial mask, epitaxially growing a plurality of source/drain regions from the semiconductor substrate, and electrically connecting the source/drain regions to other devices.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Inventors: Sung-Hsin Yang, Jung-Chi Jeng, Ru-Shang Hsiao, Kuo-Min Lin, Z.X. Fan, Chun-Jung Huang, Wen-Yu Kuo
  • Patent number: 11764174
    Abstract: A semiconductor structure including a substrate, a dielectric layer, a first conductive layer, and a passivation layer is provided. The dielectric layer is disposed on the substrate. The first conductive layer is disposed on the dielectric layer. The passivation layer is disposed on the first conductive layer and the dielectric layer. The passivation layer includes a first upper surface and a second upper surface. The first upper surface is located above a top surface of the first conductive layer. The second upper surface is located on one side of the first conductive layer. A height of the first upper surface is higher than a height of the second upper surface. The height of the second upper surface is lower than or equal to a height of a lower surface of the first conductive layer located between a top surface of the dielectric layer and the first conductive layer.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: September 19, 2023
    Assignee: United Microelectronics Corp.
    Inventors: Chun-Chi Huang, Hui-Lung Chou, Chuang-Han Hsieh, Yung-Feng Lin, Shin-Chi Chen
  • Publication number: 20230136978
    Abstract: A semiconductor structure including a substrate, a dielectric layer, a first conductive layer, and a passivation layer is provided. The dielectric layer is disposed on the substrate. The first conductive layer is disposed on the dielectric layer. The passivation layer is disposed on the first conductive layer and the dielectric layer. The passivation layer includes a first upper surface and a second upper surface. The first upper surface is located above a top surface of the first conductive layer. The second upper surface is located on one side of the first conductive layer. A height of the first upper surface is higher than a height of the second upper surface. The height of the second upper surface is lower than or equal to a height of a lower surface of the first conductive layer located between a top surface of the dielectric layer and the first conductive layer.
    Type: Application
    Filed: November 23, 2021
    Publication date: May 4, 2023
    Applicant: United Microelectronics Corp.
    Inventors: Chun-Chi Huang, Hui-Lung Chou, Chuang-Han Hsieh, Yung-Feng Lin, Shin-Chi Chen
  • Patent number: 10187221
    Abstract: The present invention discloses an automatic server dispatching system and method, in which gateways communicate with service servers via a two-way communication server. A dispatching server dispatches the gateways to the service servers according to a dispatching status of the service servers and upper service limits of the service servers.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: January 22, 2019
    Assignee: Climax Technology Co., Ltd.
    Inventors: Yi-Kai Chen, Chun Chi Huang, Hao-Cheng Lu, Pin-Hao Lin
  • Patent number: 9715061
    Abstract: In a backlight module of a display, a plurality of optical films has positioning protrusions disposed in a positioning slot of a plastic frame for correct installation of the optical films on a light guide plate. One or more middle optical films further include a fixing protrusion at the side corresponding to the light source and an existing opening formed by bending a system bracket out of a holder is provided for placement of the fixing protrusion of the middle optical films. A double-sided adhesive tape disposed between a display panel and the holder is further utilized for securing the fixing protrusion such that the middle optical films can be securely fixed and not falling apart during an impact test or a falling test.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: July 25, 2017
    Assignee: AU OPTRONICS CORP.
    Inventors: Chun-Chi Huang, Cheng-Wei Chang, Ping-Chang Yang, Shu-Ting Jhuang
  • Publication number: 20170207928
    Abstract: The present invention discloses an automatic server dispatching system and method, in which gateways communicate with service servers via a two-way communication server. A dispatching server dispatches the gateways to the service servers according to a dispatching status of the service servers and upper service limits of the service servers.
    Type: Application
    Filed: March 2, 2016
    Publication date: July 20, 2017
    Inventors: Yi-Kai Chen, Chun Chi Huang, Hao-Cheng Lu, Pin-Hao Lin
  • Patent number: 9548268
    Abstract: A semiconductor device includes an opening, a metal nitride layer, a bilayer metal layer and a conductive bulk layer. The opening is disposed in a first dielectric layer. The metal nitride layer is disposed in the opening. The bilayer metal layer is disposed on the metal nitride layer in the opening, where the bilayer metal layer includes a first metal layer and a second metal layer which is disposed on the first metal layer and has a greater metal concentration than that of the first metal layer. The conductive bulk layer is filled in the opening.
    Type: Grant
    Filed: June 4, 2015
    Date of Patent: January 17, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Chi Huang, Yung-Hung Yen, Hsin-Hsing Chen, Chih-Yueh Li, Tsun-Min Cheng
  • Publication number: 20160322299
    Abstract: A semiconductor device includes an opening, a metal nitride layer, a bilayer metal layer and a conductive bulk layer. The opening is disposed in a first dielectric layer. The metal nitride layer is disposed in the opening. The bilayer metal layer is disposed on the metal nitride layer in the opening, where the bilayer metal layer includes a first metal layer and a second metal layer which is disposed on the first metal layer and has a greater metal concentration than that of the first metal layer. The conductive bulk layer is filled in the opening.
    Type: Application
    Filed: June 4, 2015
    Publication date: November 3, 2016
    Inventors: Chun-Chi Huang, Yung-Hung Yen, Hsin-Hsing Chen, Chih-Yueh Li, Tsun-Min Cheng
  • Publication number: 20150301273
    Abstract: In a backlight module of a display, a plurality of optical films has positioning protrusions disposed in a positioning slot of a plastic frame for correct installation of the optical films on a light guide plate. One or more middle optical films further include a fixing protrusion at the side corresponding to the light source and an existing opening formed by bending a system bracket out of a holder is provided for placement of the fixing protrusion of the middle optical films. A double-sided adhesive tape disposed between a display panel and the holder is further utilized for securing the fixing protrusion such that the middle optical films can be securely fixed and not falling apart during an impact test or a falling test.
    Type: Application
    Filed: March 30, 2015
    Publication date: October 22, 2015
    Inventors: Chun-Chi Huang, Cheng-Wei Chang, Ping-Chang Yang, Shu-Ting Jhuang
  • Publication number: 20140078056
    Abstract: A pointer speed adjusting method is used in a display system including a pen-shaped pointing device and a display screen. The pointer speed adjusting method includes the following steps. Firstly, a moving trajectory of the pen-shaped pointing device is sensed. Then, a trajectory display pattern is obtained according to the moving trajectory. Then, the trajectory display pattern is compared with a reference display pattern shown on the display screen, so that an optical scale factor error is obtained. Afterwards, a speed conversion ratio is adjusted according to the optical scale factor error.
    Type: Application
    Filed: September 27, 2012
    Publication date: March 20, 2014
    Applicant: AVer Information Inc.
    Inventors: Cheng-Cheng Yu, Chun-Chi Huang, Lien-Kai Chou
  • Publication number: 20110099493
    Abstract: An image auxiliary data searching and displaying method is used in a document camera. The document camera includes a processor and a user interface. The processor is accessible to a database. The image auxiliary data searching and displaying method includes steps of performing an image-selecting operation on an image of the to-be-displayed object via the user interface to generate a target image, processing the target image by the processor to generate a target characteristic property, searching the database by the processor according to the target characteristic property so as to generate a search result, and simultaneously displaying at least one image auxiliary data from the search result and the image of the to-be-displayed object for comparison.
    Type: Application
    Filed: July 1, 2010
    Publication date: April 28, 2011
    Applicant: AVERMEDIA INFORMATION, INC.
    Inventors: Cheng-Cheng Yu, Chun-Chi Huang, Chien-Hung Chen, Lien-Kai Chou
  • Patent number: 7849337
    Abstract: The present invention is to provide a network system for transmitting various signals and power, which comprises at least a power sourcing equipment and at least a powered device over a network. Each of the power sourcing equipment and the powered device has at least a port, wherein a first isolated conductor is disposed at one side of the port while a second isolated conductor is disposed at the other side of the port and creates a power circuit for transmitting power in combination with the first isolated conductor. Four differential signal pairs of the port, each with two conductors, are disposed between the first isolated conductor and the second isolated conductor, wherein each of the power sourcing equipment and the powered device transmits Ethernet signals through two of the differential signal pairs of its port and transmits other network signals through the other two differential signal pairs.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: December 7, 2010
    Assignee: Alpha Networks Inc.
    Inventor: Chun-Chi Huang