Patents by Inventor Chun-Chi Su
Chun-Chi Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11955515Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.Type: GrantFiled: July 28, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
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Publication number: 20240096996Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.Type: ApplicationFiled: November 28, 2023Publication date: March 21, 2024Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Lo-Heng Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
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Publication number: 20180288891Abstract: A hinge and an electronic device using the same are disclosed. The hinge includes a fixing member, a shaft member, and a spring member. The fixing member includes a pivoting portion and a fixing portion. The pivoting portion and the fixing portion are respectively fixed to opposite ends of the fixing member. The shaft member is pivotably connected to the pivoting portion. The spring member includes a spring body, a first end, and a second end. The spring body is between the first end and the second end. The first end is fixed to the shaft member. The second end is fixed to the fixing portion. When the shaft member rotates, the shaft member drives the spring body to twist via the first end.Type: ApplicationFiled: March 31, 2017Publication date: October 4, 2018Inventors: Ting-Hsien WANG, Ya-Chen TSENG, Po-Hua CHU, Wei-Ting KUO, Chun-Chi SU, Tsung-Yu YANG
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Publication number: 20170201225Abstract: An all-pass wideband phase shifter is introduced. Series connections in parallel between two 3 dB hybrid couplers include combining two 90-degree phase shifters and two attenuators to form a novel phase shifter framework. Under specific controls of continuous 90-degree phase shifters and attenuators in four quadrants, 360-degree all-pass phase shifting is effected by phase shifting and vector composition.Type: ApplicationFiled: January 11, 2016Publication date: July 13, 2017Inventors: YEONG-HER WANG, CHUN-CHI SU, EN-YANG LIN, MING-WHAY LAI
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Patent number: 9148309Abstract: An apparatus for estimating channel effects is provided. A receiving module receives first data and first reference information arriving in a first time period, second data and second reference data arriving in a second time period, and third data and third reference data arriving in a third time period. An estimation module estimates channel effects corresponding to the first and third data, and the first, second and third reference data, respectively. A coefficient calculation module performs a Wiener filter coefficient calculation on the channel effects corresponding to the first, second and third reference data to generate a set of time-domain interpolation coefficients. An interpolation module interpolates the channel effects corresponding to the first third data according to the set of time-domain interpolation coefficients to generate a channel effect corresponding to the second data.Type: GrantFiled: February 6, 2014Date of Patent: September 29, 2015Assignee: MSTAR SEMICONDUCTOR, INC.Inventors: Chun-Chi Su, Ching-Fu Lan, Chun-Chieh Wang, Tai-Lai Tung, Tung-Sheng Lin
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Patent number: 8942328Abstract: A timing recovery apparatus for compensating a sampling frequency offset of an input signal is provided. The timing recovery apparatus includes a timing error corrector configured to generate an output signal according to the input signal and a calibration signal, a gain controller configured to adjust at least one of a signal edge low-frequency error component and a signal edge high-frequency error component of the output signal and accordingly generate an adjusted signal, a timing error detector configured to generate an error signal according to the adjusted signal, and a calibration signal generator coupled to the timing error detector and the timing error corrector, for generating the calibration signal according to the error signal and outputting the calibration signal to the timing error corrector to compensate the sampling frequency offset of the input signal.Type: GrantFiled: December 18, 2013Date of Patent: January 27, 2015Assignee: MStar Semiconductor, Inc.Inventors: Ko-Yin Lai, Chun-Chi Su, Chih-Cheng Kuo, Chia-Sheng Peng
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Publication number: 20140219403Abstract: An apparatus for estimating channel effects is provided. A receiving module receives first data and first reference information arriving in a first time period, second data and second reference data arriving in a second time period, and third data and third reference data arriving in a third time period. An estimation module estimates channel effects corresponding to the first and third data, and the first, second and third reference data, respectively. A coefficient calculation module performs a Wiener filter coefficient calculation on the channel effects corresponding to the first, second and third reference data to generate a set of time-domain interpolation coefficients. An interpolation module interpolates the channel effects corresponding to the first third data according to the set of time-domain interpolation coefficients to generate a channel effect corresponding to the second data.Type: ApplicationFiled: February 6, 2014Publication date: August 7, 2014Applicant: MSTAR SEMICONDUCTOR, INC.Inventors: Chun-Chi Su, Ching-Fu Lan, Chun-Chieh Wang, Tai-Lai Tung, Tung-Sheng Lin
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Publication number: 20140177758Abstract: A timing recovery apparatus for compensating a sampling frequency offset of an input signal is provided. The timing recovery apparatus includes a timing error corrector configured to generate an output signal according to the input signal and a calibration signal, a gain controller configured to adjust at least one of a signal edge low-frequency error component and a signal edge high-frequency error component of the output signal and accordingly generate an adjusted signal, a timing error detector configured to generate an error signal according to the adjusted signal, and a calibration signal generator coupled to the timing error detector and the timing error corrector, for generating the calibration signal according to the error signal and outputting the calibration signal to the timing error corrector to compensate the sampling frequency offset of the input signal.Type: ApplicationFiled: December 18, 2013Publication date: June 26, 2014Applicant: MStar Semiconductor, Inc.Inventors: Ko-Yin Lai, Chun-Chi Su, Chih-Cheng Kuo, Chia-Sheng Peng