Abstract: A video system that partitions slices of video pictures into slice chunks is provided. A video decoder receives data from a bitstream to be decoded as a current picture of a video. When a first syntax element in a picture parameter set (PPS) of the current picture indicates that one or more slices of the current picture are allowed to be divided into multiple slice chunks and when a second syntax element in a slice header of a current slice of the current picture indicates that data of the current slice is encoded and delivered in two or more slice chunks, the video decoder parses and specifies sizes and positions of the slice chunks of the current slice and reconstructs the current picture based on the slice chunks of the current slice.

Abstract: Video processing methods and apparatuses for coding a current block by constructing a candidate set including an average candidate generated from two or more original motion candidates. At least one MV of the average candidate is derived by directly averaging MVs of the original motion candidates in one of list 0 and list 1 without scaling regardless whether the MVs are pointing to same or different reference pictures. A selected candidate is determined from the candidate set as a MVP for a current MV of the current block for encoding or decoding the current block.

Abstract: A semiconductor device includes a gate structure on a substrate, an offset spacer adjacent to the gate structure, a main spacer around the offset spacer, a source/drain region adjacent to two sides of the main spacer, a contact etch stop layer (CESL) adjacent to the main spacer, and an interlayer dielectric (ILD) layer around the CESL. Preferably, a dielectric constant of the offset spacer is higher than a dielectric constant of the main spacer.

Abstract: A video coder that implements illumination compensation is provided. The video coder receives a first block of pixels in a first video picture to be coded as a current block, wherein the current block is associated with a motion vector that references a second block of pixels in a second video picture as a reference block. The video coder performs inter-prediction for the current block by using the motion vector to generate a set of motion-compensated pixels for the current block. The video coder modifies the set of motion-compensated pixels of the current block by applying a linear model that is computed based on neighboring samples of the reference block and of the current block. The neighboring samples are identified based on a position of the current block within a larger block.

Abstract: Exemplary video processing methods and apparatuses for encoding or decoding a current block by inter prediction are disclosed. Input data of a current block is received and partitioned into sub-partitions and motion refinement is independently performed on each sub-partition. A reference block for each sub-partition is obtained from one or more reference pictures according to an initial motion vector (MV). A refined MV for each sub-partition is derived by searching around the initial MV with N-pixel refinement. One or more boundary pixels of the reference block for a sub-partition is padded for motion compensation of the sub-partition. A final predictor for the current block is generated by performing motion compensation for each sub-partition according to its refined MV. The current block is then encoded or decoded according to the final predictor.

Abstract: A video codec that encodes or decodes video sequences using decoder-side motion vector refinement is provided. The video codec identifies a first motion vector and a second motion vector for coding a current block of pixels of a current video frame in the video sequence. The video codec determines whether to perform motion vector refinement for the current block of pixels based on a comparison between a linear dimension of the current block of pixels and a threshold. When motion vector refinement is performed, the video codec refines the first and second motion vectors to minimize a distortion cost and codes the current block of pixels by using the refined first and second motion vectors. When motion vector refinement is not performed, the video codec codes the current block of pixels by using the identified first and second motion vectors.

Abstract: A video coder that implicitly signals a transform setting for coding a block of pixels is provided. The video coder derives a transform setting for a block of pixels based on a block processing setting. The video coder processes the block of pixels according to the block processing setting. For encoding, the video coder transforms a set of residual pixels to generate a set of transform coefficients according to the transform setting. For decoding, the video coder inverse transforms the transform coefficients to generate a set of residual pixels according to the transform setting.

Abstract: A method and apparatus of video coding using history-based candidate derivation are disclosed. According to one method, a current block is inside a Shared Merge candidate list Region (SMR) or a history-based parallel processing region is received. The current block is encoded or decoded using a Merge candidate list. Only if the current block is one of first-coded N (N?0) blocks, one of last-coded N blocks, or one of selected N blocks, the history-based candidate list is updated after the current block is encoded or decoded. In one embodiment, Merge candidate list is pre-generated for the current block in the SMR and is separately generated for the current block in the history-based parallel processing region. In another method, if the current block is inside the SMR or the history-based parallel processing region, the current block is encoded or decoded using a history-based candidate list associated with the root CU.

Abstract: A high-speed circuit with a high-voltage (HV) driver circuit. The high-speed circuit has a driver circuit and a level shifter. The driver circuit includes HV components which are operated in an HV domain. The level shifter includes low-voltage (LV) components which are operated in an LV domain. The level shifter translates signals from the LV domain to the HV domain to generate control signals for the driver circuit. The high-speed circuit may include a protection voltage generator converting a power supply voltage and a power ground voltage to generate a first direct-current bias voltage (VBP) and a second direct-current bias voltage (VBN) to bias the LV components of the level shifter. The LV components of the level shifter include input transistors and protection transistors. Gate voltages of the protection transistors may be tied to VBP or VBN.

Abstract: A video coder that uses a shared candidate list to encode or decode multiple blocks of pixels within a shared boundary is provided. The video coder identifies a shared boundary encompassing a plurality of blocks of pixels of a current picture in a video sequence. The video coder identifies one or more prediction candidates as a shared candidate list based on neighbors of a region defined by the shared boundary. The video coder codes one or more blocks of pixels encompassed by the shared boundary by using one or more prediction candidates selected from the shared candidate list.

Abstract: A video decoder determines whether the current block is coded by using intra block copy mode. The video decoder identifies a list of one or more prediction candidates for the current block. When the current block is not coded by using intra block copy mode, one or more spatial neighbors of the current block that are positioned in a same MER as the current block are excluded from the list of prediction candidates. When the current block is coded by using intra block copy mode and the list of prediction candidates belongs to a predefined subset of multiple different candidate lists, at least one of the identified prediction candidates is a spatial neighbor of the current block that is positioned in the MER. The video decoder reconstructs the current block by using a prediction candidate selected from the list of prediction candidates to generate a prediction of the current block.

Abstract: Video processing methods and apparatuses include receiving input video data, determining a Merge number for a regular Merge mode, comparing the Merge number for the regular Merge mode with a predefined value, and only signaling or parsing a difference between the Merge number for the regular Merge mode and a Merge number for a Geometric Partition Mode (GPM) Merge mode when the Merge number for the regular Merge mode is larger than or equal to the predefined value. The difference between the Merge numbers is inferred to 0 when the difference is not signaled. The Merge number for the GPM Merge mode defines a size of a GPM Merge candidate list constructed for each block coded or to be coded by the GPM Merge mode.

Abstract: A method and apparatus of video coding operate by receiving input data associated with a current data unit in a current picture, wherein the current data unit includes a luma component and a chroma component and the current data unit includes a luma data unit and a chroma data unit. The operation proceeds by splitting the luma data unit and the Chroma data unit using one shared tree until the luma data unit and the chroma data unit reach a stop node, encoding or decoding the stop node as a leaf CU (coding unit) if the stop node is greater than M×N for the luma component, M and N are positive integers, and signalling or parsing a prediction mode for the stop node if the stop node is smaller than or equal to M×N for the luma component.

Abstract: Exemplary video processing methods and apparatuses for coding a current block. One implementation operates by receiving input video data associated with a current block in a current picture; determining one or more Motion Vectors (MVs) for generating an OBMC region; generating one or more converted MVs by changing said one or more MVs to one or more integer MVs or changing a MV component of said one or more MVs to an integer component; deriving the OBMC region by motion compensation using said one or more converted MVs; applying OBMC by blending an OBMC predictor in the OBMC region with an original predictor; and encoding or decoding the current block.

Abstract: A video coder receives data from a bitstream for a block of pixels to be encoded or decoded as a current block of a current picture of a video. Upon determining that an applied block setting of the current block satisfies a threshold condition, the video coder generates a first prediction based on a first motion information for a first prediction unit of the current block. The video coder generates a second prediction based on a second motion information for a second prediction unit of the current block. The video coder generates a third prediction based on the first and second motion information for an overlap prediction region that is defined based on a partitioning between the first prediction unit and the second prediction unit. The video coder encodes or decodes the current block by using the first, second, and third predictions.

Abstract: A video codec receives data to be encoded or decoded as a current block of a current picture of a video. first and/or second flags indicate whether to apply a first combined prediction mode or a second combined prediction mode. The video codec decodes or encodes the current block. When the combined inter and intra prediction mode is applied, the current block is coded by using a combined prediction that is generated based on an inter-prediction and an intra-prediction. When the triangle prediction mode is applied, the current block is coded by using a combined prediction that is generated based on at least two inter-predictions.

Abstract: A control method for a memory device uses an inverting data to label that a data stored in a memory block is in an inverting state or a non-inverting state. According to the inverting data, the number of bits whose data states is changed is lower than a half of total bits in the memory block in writing operation. Therefore, an energy consumption of the memory device can reduce. The control method of the present invention also can utilize the inverting data to label a memory block with a defective bit and to select a spare block to repair the memory block with a defective bit.

Abstract: A video decoder that implements a mutually exclusive grouping of coding modes is provided. The video decoder receives data for a block of pixels to be decoded as a current block of a current picture of a video. When a first coding mode for the current block is enabled, a second coding mode is disabled for the current block, wherein the first and second coding modes specify different methods for computing an inter-prediction for the current block. The current block is decoded by using an inter-prediction that is computed according to an enabled coding mode.

Abstract: A method and apparatus Inter prediction for video coding including IBC (Intra Block Copy) coding tool are disclosed. According to one method, a current permitted band inside the current picture for the current block is identified. A target IBC candidate is selected, where a target block vector of the target IBC candidate points from the current block to a target reference block in the current picture. An adjusted candidate list is generated by taking into account of the target IBC candidate and the current permitted band. The current motion information associated with the current block is encoded using the adjusted candidate list at the video encoder side or decoded using the adjusted candidate list at the video decoder side using the adjusted candidate list. In another method, a syntax for a target MVD (Motion Vector Difference) is decoded without sign information or with reduced sign information of the target MVD.

Abstract: The present invention provides a control method of a receiver. The control method includes the steps of: when the receiver enters a sleep/standby mode, continually detecting an auxiliary signal from an auxiliary channel to generate a detection result; and if the detection result indicates that the auxiliary signal has a preamble or a specific pattern, generating a wake-up control signal to wake up the receiver before successfully receiving the auxiliary signal having a wake-up command.