Patents by Inventor Chun-Chia Chen

Chun-Chia Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190238883
    Abstract: A video codec that encodes or decodes video sequences using decoder-side motion vector refinement is provided. The video codec identifies a first motion vector and a second motion vector for coding a current block of pixels of a current video frame in the video sequence. The video codec determines whether to perform motion vector refinement for the current block of pixels based on a comparison between a linear dimension of the current block of pixels and a threshold. When motion vector refinement is performed, the video codec refines the first and second motion vectors to minimize a distortion cost and codes the current block of pixels by using the refined first and second motion vectors. When motion vector refinement is not performed, the video codec codes the current block of pixels by using the identified first and second motion vectors.
    Type: Application
    Filed: January 15, 2019
    Publication date: August 1, 2019
    Inventors: Chun-Chia Chen, Zhen-Yen Lai, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen
  • Publication number: 20190222834
    Abstract: Aspects of the disclosure provide a method for video coding. The method includes determining a set of affine merge candidate (AMC) positions of a set of AMC blocks coded using affine motion models for a current block in a current picture. The set of AMC blocks includes at least one of: a set of AMC side blocks that are spatially neighboring blocks located on one or more sides of the current block in the current picture and an AMC temporal block in a reference picture of the current block. The current block is predicted from the reference picture using a merge mode. The method includes generating a set of affine merge candidates for the current block corresponding to the set of AMC blocks, and constructing a merge candidate list for the current block including the set of affine merge candidates.
    Type: Application
    Filed: January 11, 2019
    Publication date: July 18, 2019
    Applicant: MEDIATEK INC.
    Inventors: Chun-Chia CHEN, Chih-Wei HSU, Ching-Yeh CHEN
  • Publication number: 20190188076
    Abstract: A memory with an error correction function includes a controller and a memory cell array. The controller optionally writes written data to a normal storage area and a backup area of the memory cell array, and when the controller reads first data corresponding to the written data from the normal storage area, if at least two errors are included in the first data, the controller reads the backup area to output second data corresponding to the written data from the backup area.
    Type: Application
    Filed: December 18, 2018
    Publication date: June 20, 2019
    Inventors: Ho-Yin Chen, Ting-Feng Chang, Chun-Chia Chen
  • Publication number: 20190140077
    Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate structure on a substrate, forming a contact etch stop layer (CESL) on the gate structure, forming an interlayer dielectric (ILD) layer around the gate structure, performing a curing process so that an oxygen concentration of the CESL is different from the oxygen concentration of the ILD layer, and then performing a replacement metal gate process (RMG) process to transform the gate structure into a metal gate.
    Type: Application
    Filed: January 3, 2019
    Publication date: May 9, 2019
    Inventors: Te-Chang Hsu, Chun-Chia Chen, Yao-Jhan Wang
  • Patent number: 10275868
    Abstract: An object analyzing method applied to an object analyzing system. The object analyzing method comprises: (a) applying at least one analyzing parameter extracting process according to an object type for an target object, to extract at least one analyzing parameter for the target object; (b) selecting least one analyzing model according to the object type; and (c) applying the analyzing model selected in the step (b), to analyze the analyzing parameter and accordingly generate an analyzing result.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: April 30, 2019
    Assignee: MEDIATEK INC.
    Inventors: Chun-Chia Chen, Liang-Che Sun
  • Patent number: 10249729
    Abstract: A method for fabricating a semiconductor device. After forming SiGe epitaxial layer within the Core_p region, the hard mask is removed. A contact etch stop layer (CESL) is deposited on the composite spacer structure and the epitaxial layer. An ILD layer is deposited on the CESL. The ILD layer is polished to expose a top surface of the dummy gate. The dummy gate and a first portion of the first nitride-containing layer of the composite spacer structure are removed, thereby forming a gate trench and exposing the first gate dielectric layer. The first gate dielectric layer is removed from the gate trench, and a second portion of the first nitride-containing layer and the oxide layer are removed from the composite spacer structure, while leaving the second nitride-containing layer intact.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: April 2, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ying-Hsien Chen, Chun-Chia Chen, Yao-Jhan Wang, Chih-wei Yang, Te-Chang Hsu
  • Publication number: 20190058050
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a spacer around the gate structure; forming a first contact etch stop layer (CESL) around the spacer; forming a mask layer on the first CESL; removing part of the mask layer; removing part of the first CESL; forming a second CESL on the mask layer and the gate structure; and removing part of the second CESL.
    Type: Application
    Filed: September 20, 2017
    Publication date: February 21, 2019
    Inventors: Te-Chang Hsu, Chun-Chia Chen, Yao-Jhan Wang, Chun-Jen Huang
  • Patent number: 10209723
    Abstract: A low-voltage differential signaling (LVDS) driving circuit, coupled to a load resistor via a first output end and a second output end, includes: a voltage generating unit, providing a first reference voltage; a first switch, coupled between the voltage generating unit and a first node; a second switch, coupled between the voltage generating unit and a second node; a third switch, coupled between the first node and a third node, the third node having a second reference voltage; a fourth switch, coupled between the second node and the third node; a first resistor, coupled between the first node and the first output end; and a second resistor, coupled between the second node and the second output end. The first resistor and the second resistor are in a series connection with the load resistor.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: February 19, 2019
    Assignee: MSTAR SEMICONDUCTOR, INC.
    Inventors: Yu-Hsiang Huang, Jyun-Yang Shih, Chun-Chia Chen
  • Patent number: 10211314
    Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate structure on a substrate, forming a contact etch stop layer (CESL) on the gate structure, forming an interlayer dielectric (ILD) layer around the gate structure, performing a curing process so that an oxygen concentration of the CESL is different from the oxygen concentration of the ILD layer, and then performing a replacement metal gate process (RMG) process to transform the gate structure into a metal gate.
    Type: Grant
    Filed: October 22, 2017
    Date of Patent: February 19, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Te-Chang Hsu, Chun-Chia Chen, Yao-Jhan Wang
  • Patent number: 10185336
    Abstract: A receiver includes a bias current source, a comparator and an output circuit. The bias current source is powered by a first voltage source, and generates a bias current according to a second voltage source. The first voltage source is higher than the second voltage source. The comparator, coupled to the bias current source, compares two input signals to generate a comparison signal according to the bias current. The output circuit is powered by the second voltage source, and generates an output signal according to the comparison signal. The output signal and the second voltage source belong to the same power domain.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: January 22, 2019
    Assignee: MSTAR SEMICONDUCTOR, INC.
    Inventors: Chun-Chia Chen, Jian-Feng Shiu, Chia-Chi Liu
  • Patent number: 10163188
    Abstract: A buffer write method for a buffer, including a plurality of M-bit storage units, has following steps: obtaining pixel data of a plurality of first N-bit pixels of a picture; calculating a corresponding start address of the buffer for the pixel data of the first N-bit pixels; and storing the first N-bit pixels of the picture according to the calculated start address of the buffer in the M-bit storage units by a buffer controller. The storing step includes fully storing at least one of the first N-bit pixels in one of the M-bit storage units storage units, wherein M and N are positive integers, and M is not divisible by N.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: December 25, 2018
    Assignee: MEDIATEK INC.
    Inventors: Chun-Chia Chen, Chi-Cheng Ju, Yung-Chang Chang
  • Publication number: 20180352223
    Abstract: A reduced merge candidate signaling method is provided. When building a merge candidate list for a prediction unit (PU) of a block of pixels, a video codec skips or partially skips the construction of some sub-PU merge candidates. The video codec then performs simplified pruning operations on the merge candidate list based on the skipped or partially constructed sub-PU merge candidates. The pruned candidate list is then used to select a merge candidate to encode or decode the block of pixels.
    Type: Application
    Filed: May 29, 2018
    Publication date: December 6, 2018
    Inventors: Chun-Chia Chen, Chih-Wei Hsu, Ching-Yeh Chen
  • Patent number: 10134107
    Abstract: A data arrangement method includes following steps: obtaining pixel data of a plurality of first N-bit pixels of a picture; and storing the obtained pixel data of the first N-bit pixels in a plurality of M-bit storage units of a first buffer according to a block-based scan order of the picture. The picture includes a plurality of data blocks, and the block-based scan order includes a raster-scan order for the data blocks. At least one of the M-bit storage units is filled with part of the obtained pixel data of the first N-bit pixels, M and N are positive integers, M is not divisible by N, and the first N-bit pixels include at least one pixel divided into a first part stored in one of the M-bit storage units in the first buffer and a second part stored in another of the M-bit storage units in the first buffer.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: November 20, 2018
    Assignee: MEDIATEK INC.
    Inventors: Chun-Chia Chen, Chi-Cheng Ju, Yung-Chang Chang, Ping Chao
  • Publication number: 20180310017
    Abstract: Aspects of the disclosure provide a video coding method for processing a current prediction unit (PU) with sub-PU temporal motion vector prediction (TMVP) mode. The method can include performing sub-PU TMVP algorithms to derive sub-PU TMVP candidates, and including none or a subset of the derived sub-PU TMVP candidates into a merge candidate list of the current PU. Each of the derived sub-PU TMVP candidates can include sub-PU motion information of sub-PUs of the current PU.
    Type: Application
    Filed: April 16, 2018
    Publication date: October 25, 2018
    Applicant: MEDIATEK INC.
    Inventors: Chun-Chia Chen, Chih-Wei Hsu, Ching-Yeh Chen
  • Publication number: 20180288430
    Abstract: Aspects of the disclosure provide a video coding method for processing a current prediction unit (PU) with a sub-PU temporal motion vector prediction (TMVP) mode. The method can include receiving the current PU including sub-PUs, determining an initial motion vector that is a motion vector of a spatial neighboring block of the current PU, performing a searching process to search for a main collocated picture in a sequence of reference pictures of the current PU based on the initial motion vector, and obtaining collocated motion information in the main collocated picture for the sub-PUs of the current PU. The searching process can include turning on motion vector scaling operation for searching a subset of the sequence of reference pictures, and turning off the motion vector scaling operation for searching the other reference pictures in the sequence of reference pictures.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 4, 2018
    Applicant: MEDIATEK INC.
    Inventors: Chun-Chia Chen, Chih-Wei Hsu, Ching-Yeh Chen, Yu-Wen Huang
  • Publication number: 20180239378
    Abstract: A receiver includes a bias current source, a comparator and an output circuit. The bias current source is powered by a first voltage source, and generates a bias current according to a second voltage source. The first voltage source is higher than the second voltage source. The comparator, coupled to the bias current source, compares two input signals to generate a comparison signal according to the bias current. The output circuit is powered by the second voltage source, and generates an output signal according to the comparison signal. The output signal and the second voltage source belong to the same power domain.
    Type: Application
    Filed: June 1, 2017
    Publication date: August 23, 2018
    Inventors: Chun-Chia Chen, Jian-Feng Shiu, Chia-Chi Liu
  • Publication number: 20180242024
    Abstract: Video processing methods and apparatuses for candidate set determination for a current block partitioned from a parent block by quad-tree splitting comprise receiving input data of a current block, determining a candidate set for the current block by prohibiting a spatial candidate derived from any of neighboring blocks partitioned from the same parent block or determining the candidate set for the current block by conducting a pruning process if all the neighboring blocks are coded in Inter prediction and motion information of the neighboring blocks are the same, and encoding or decoding the current block based on the candidate set by selecting one final candidate from the candidate set. The pruning process comprises scanning the candidate set to determine if any candidate equals to the spatial candidate derived from the neighboring blocks, and removing the candidate equals to the spatial candidate from the candidate set.
    Type: Application
    Filed: January 12, 2018
    Publication date: August 23, 2018
    Inventors: Chun-Chia CHEN, Chih-Wei HSU, Tzu-Der CHUANG, Ching-Yeh CHEN, Yu-Wen HUANG
  • Patent number: 10055563
    Abstract: A wearable device interactive system and techniques, methods and apparatuses thereof are described. A wearable device may sense a movement by a user wearing the wearable device. The wearable device may also determine whether a path of the movement corresponds to one or more predefined patterns. The wearable device may further perform one or more operations in response to a determination that the path of the movement corresponds to at least one of the one or more predefined patterns.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: August 21, 2018
    Assignee: MEDIATEK INC.
    Inventors: Yu-Hao Huang, Chih-Kai Chang, Chun-Chia Chen, Tsu-Ming Liu
  • Publication number: 20180227593
    Abstract: Aspects of the disclosure provide a method for video coding in merge mode or skip mode. The method can include receiving a prediction block (PB) of a picture, determining number and positions of merge candidates of the PB according to a size and/or a shape of the PB, and constructing a candidate list including motion data of a subset of the merge candidate positions.
    Type: Application
    Filed: January 18, 2018
    Publication date: August 9, 2018
    Applicant: MEDIATEK INC.
    Inventors: Chun-Chia CHEN, Chih-Wei HSU, Yu-Wen HUANG
  • Publication number: 20180218594
    Abstract: A depth-control method for home appliances in an indoor space and an associated electronic system are provided. The method includes the steps of: connecting the home appliances to a portable electronic device via one or more wireless channels; obtaining identity information for the home appliances using the portable electronic device via the one or more wireless channels; detecting sensor data associated with the portable electronic device; selecting one among a first set of the home appliances according to the sensor data; and controlling the selected home appliance using the portable electronic device.
    Type: Application
    Filed: January 30, 2017
    Publication date: August 2, 2018
    Inventors: Chih-Kai CHANG, Shuo-Li SHIH, Chun-Chia CHEN, Tsu-Ming LIU