Patents by Inventor Chun-Chieh Su

Chun-Chieh Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978773
    Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a base structure. The semiconductor device structure also includes a first epitaxial structure and a second epitaxial structure sandwiching the channel structures. The semiconductor device structure further includes a gate stack wrapped around each of the channel structures and a backside conductive contact connected to the second epitaxial structure. A first portion of the backside conductive contact is directly below the base structure, and a second portion of the backside conductive contact extends upwards to approach a bottom surface of the second epitaxial structure. In addition, the semiconductor device structure includes an insulating spacer between a sidewall of the base structure and the backside conductive contact.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Shih-Chuan Chiu, Cheng-Chi Chuang, Chih-Hao Wang
  • Publication number: 20240120391
    Abstract: Embodiments of the present disclosure provide semiconductor device structures and methods of forming the same. The structure includes a first source/drain region disposed under a well portion, a second source/drain region disposed adjacent the first source/drain region, a dielectric material disposed between the first and second source/drain regions, and a conductive contact having a first portion disposed under the first source/drain region and a second portion disposed adjacent the first source/drain region. The second portion is disposed in the dielectric material. The structure further includes a conductive feature disposed in the dielectric material, and the conductive feature is electrically connected to the conductive contact. The conductive feature has a top surface that is substantially coplanar with a top surface of the well portion.
    Type: Application
    Filed: January 19, 2023
    Publication date: April 11, 2024
    Inventors: Chun-Yuan CHEN, Huan-Chieh SU, Chih-Hao WANG
  • Patent number: 11955515
    Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
  • Patent number: 11949437
    Abstract: A wideband antenna system includes a metal radiating portion, an aperture contact, a feed contact, an aperture tuner, an impedance tuner, a first switch, and a second switch. Two ends of the metal radiating portion respectively include a first contact and a second contact. The aperture contact is electrically connected to the metal radiating portion and is located between the first contact and the second contact. The feed contact is electrically connected to the metal radiating portion and is located between the first contact and the aperture contact. The aperture tuner is electrically connected to the aperture contact, and the impedance tuner is electrically connected to the feed contact. The first switch is electrically connected between the first contact and a zero-ohm resistor to selectively effect connection of the first contact to the zero-ohm resistor. The second switch is electrically connected between the first contact and the impedance.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: April 2, 2024
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chien-Ming Hsu, Chun-Chieh Su
  • Patent number: 11942530
    Abstract: The present disclosure relates to a semiconductor device having a backside source/drain contact, and method for forming the device. The semiconductor device includes a source/drain feature having a top surface and a bottom surface, a first silicide layer formed in contact with the top surface of the source/drain feature, a first conductive feature formed on the first silicide layer, and a second conductive feature having a body portion and a first sidewall portion extending from the body portion, wherein the body portion is below the bottom surface of the source/drain feature, and the first sidewall portion is in contact with the first conductive feature.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Yuan Chen, Pei-Yu Wang, Huan-Chieh Su, Chih-Hao Wang
  • Publication number: 20240096996
    Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Lo-Heng Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
  • Publication number: 20240096701
    Abstract: A device includes: a stack of semiconductor nanostructures; a gate structure wrapping around the semiconductor nanostructures, the gate structure extending in a first direction; a source/drain region abutting the gate structure and the stack in a second direction transverse the first direction; a contact structure on the source/drain region; a backside conductive trace under the stack, the backside conductive trace extending in the second direction; a first through via that extends vertically from the contact structure to a top surface of the backside dielectric layer; and a gate isolation structure that abuts the first through via in the second direction.
    Type: Application
    Filed: May 17, 2023
    Publication date: March 21, 2024
    Inventors: Chun-Yuan CHEN, Huan-Chieh SU, Ching-Wei TSAI, Shang-Wen CHANG, Yi-Hsun CHIU, Chih-Hao WANG
  • Publication number: 20240063535
    Abstract: A wideband antenna system includes a first metal radiation portion, having a coupling distance with a second metal radiation portion; a first feeding contact and a second feeding contact, electrically connected to the first metal radiation portion and the second metal radiation portion respectively, and close to the coupling distance; a first ground contact, electrically connected to the second metal radiation portion; a second ground contact, electrically connected to the first metal radiation portion; an impedance tuner, electrically connected to the first feeding contact, the second feeding contact, the first ground contact, the second ground contact, and a radio frequency signal source, to switch the first metal radiation portion and the second metal radiation portion; an aperture contact, electrically connected to the first metal radiation portion; and an aperture tuner, electrically connected to the aperture contact.
    Type: Application
    Filed: March 9, 2023
    Publication date: February 22, 2024
    Inventors: Chun-Chieh SU, Wei-Cheng LO, Chien-Ming HSU, Che-Yen LIN, Chuan-Chien HUANG
  • Publication number: 20220231708
    Abstract: A wideband antenna system includes a metal radiating portion, an aperture contact, a feed contact, an aperture tuner, an impedance tuner, a first switch, and a second switch. Two ends of the metal radiating portion respectively include a first contact and a second contact. The aperture contact is electrically connected to the metal radiating portion and is located between the first contact and the second contact. The feed contact is electrically connected to the metal radiating portion and is located between the first contact and the aperture contact. The aperture tuner is electrically connected to the aperture contact, and the impedance tuner is electrically connected to the feed contact. The first switch is electrically connected between the first contact and a zero-ohm resistor to selectively effect connection of the first contact to the zero-ohm resistor. The second switch is electrically connected between the first contact and the impedance.
    Type: Application
    Filed: January 10, 2022
    Publication date: July 21, 2022
    Inventors: Chien-Ming Hsu, Chun-Chieh Su