Patents by Inventor Chun-Chieh Yang

Chun-Chieh Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240134807
    Abstract: The invention relates to a logic control device of a serial peripheral interface, a master-slave system and a master-slave switchover method therefor. The logic control device is connected between N masters and M slaves, and define master-slave connection relationships between each of the masters and each of the slaves. Each of the master-slave connection relationship is that each of the masters and each of the slaves transmit information one-to-one at the same time, and includes connecting the logic control device between the masters and the slaves to form the master-slave system as well as the master-slave switchover method therefor.
    Type: Application
    Filed: October 19, 2022
    Publication date: April 25, 2024
    Inventors: CHUN CHIEH WANG, CHENG YU WANG, JIN KAI YANG
  • Patent number: 11955245
    Abstract: A method and a system for mental index prediction are provided. The method includes the following steps. A plurality of images of a subject person are obtained. A plurality of emotion tags of the subject person in the images are analyzed. A plurality of integrated emotion tags in a plurality of predetermined time periods are calculated according to the emotion tags respectively corresponding to the images. A plurality of preferred features are determined according to the integrated emotion tags. A mental index prediction model is established according to the preferred features to predict a mental index according to the emotional index prediction model.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: April 9, 2024
    Assignees: Acer Incorporated, National Yang Ming Chiao Tung University
    Inventors: Chun-Hsien Li, Szu-Chieh Wang, Andy Ho, Liang-Kung Chen, Jun-Hong Chen, Li-Ning Peng, Tsung-Han Yang, Yun-Hsuan Chan, Tsung-Hsien Tsai
  • Publication number: 20240106197
    Abstract: A laser automatic compensation control device includes a controller, a digital array, a decoder, a compensation array and a synchronizer. The controller is configured for receiving a number of laser energy signals and comparing each laser energy signal with a corresponding preset energy value to obtain a corresponding output digital signal. The digital array is electrically connected to the controller and configured for storing the output digital signals. The decoder is electrically connected to the digital array and configured for converting the output digital signals into a number of analog compensation signals. The compensation array is electrically connected to the decoder and configured for storing the analog compensation signals. The synchronizer is electrically connected to the compensation array and configured for receiving the analog compensation signals, and synchronously outputting the analog compensation signals to a laser diode array.
    Type: Application
    Filed: November 1, 2022
    Publication date: March 28, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Jia-You WANG, Fu-Shun HO, Chun-Chieh YANG, Chih-Chun CHEN
  • Patent number: 11914873
    Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: February 27, 2024
    Assignee: Silicon Motion, Inc.
    Inventors: Tsung-Chieh Yang, Chun-Chieh Kuo, Ching-Hui Lin, Yang-Chih Shen
  • Publication number: 20240030338
    Abstract: A semiconductor device includes an active layer having first and second active regions, first and second source electrodes, first and second drain electrodes, first and second gate electrodes, a first source metal layer, first and second drain metal layers, and a source pad electrically connected to the first source metal layer. The second drain metal layer is electrically connected to the second drain electrode and the first source metal layer. A projection of the second drain metal layer on the active layer forms a drain metal layer region. An projection of the source pad on the active layer forms a source pad region. An area of an overlapping region between the source pad region and the drain metal layer region is smaller than or equal to 40% of an area of the drain metal layer region.
    Type: Application
    Filed: October 6, 2023
    Publication date: January 25, 2024
    Inventors: Li-Fan LIN, Chun-Chieh YANG, Ying-Chen LIU
  • Patent number: 11817494
    Abstract: A semiconductor device includes an active layer having an active region, a source electrode, a drain electrode, a gate electrode, a source metal layer, a drain metal layer, and a source pad. The source metal layer and the drain metal layer are electrically connected to the source electrode and the drain electrode, respectively. An orthogonal projection of the drain metal layer on the active layer each forms a drain metal layer region. The source pad is electrically connected to the source metal layer. An orthogonal projection of the source pad on the active layer forms a source pad region overlapping the drain metal layer. An area of an overlapping region between the source pad region and the drain metal layer region is smaller than or equal to 40% of an area of the drain metal layer region.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: November 14, 2023
    Assignee: ANCORA SEMICONDUCTORS INC.
    Inventors: Li-Fan Lin, Chun-Chieh Yang, Ying-Chen Liu
  • Publication number: 20230141631
    Abstract: An aluminum battery separator applied between a positive electrode and a negative electrode of an aluminum battery includes a polymer material layer. An electrolyte is included between the positive electrode and the negative electrode of the aluminum battery. The polymer material layer includes one or more polymer materials, and the aluminum battery separator does not include a glass fiber material.
    Type: Application
    Filed: November 8, 2022
    Publication date: May 11, 2023
    Applicant: APh ePower Co., Ltd.
    Inventors: Jui-Hsuan Wu, Li-Hsien Chou, Chun-Chieh Yang
  • Patent number: 11355625
    Abstract: A device includes a first transistor and a second transistor. The first transistor includes a first gate terminal coupled to the first source terminal, a first source terminal, and a first drain terminal. The second transistor includes a second gate terminal coupled to the first drain terminal, a second source terminal, and a second drain terminal.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: June 7, 2022
    Assignees: DELTA ELECTRONICS, INC., NATIONAL CENTRAL UNIVERSITY
    Inventors: Chun-Chieh Yang, Yue-Ming Hsin, Yi-Nan Zhong, Yu-Chen Lai
  • Patent number: 11322871
    Abstract: An electrical connector assembly includes a seat unit and a cover unit. The seat unit defines a receiving cavity for receiving the CPU. The cover unit is pivotably mounted upon one end of the seat unit. The cover unit includes a first cover and a second cover surrounding the first cover. The first cover includes a first frame equipped with therein a floating heat sink which is located above and aligned with the receiving cavity. The heat sink forms a pair of side extensions sandwiched between a pair of pressing blocks and the first frame in a vertical direction and essentially downwardly pressed by the pair of pressing blocks of the first cover in a resilient manner. Resilient mechanism is provided between the pressing block and the heat sink to result in a downward force constantly urge the heat sink downwardly against the first frame.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: May 3, 2022
    Assignees: FOXCONN (KUNSHAN) COMPUTER CONNECTOR CO., LTD., FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Chun-Chieh Yang, Wei-Chih Lin, Hsiu-Yuan Hsu
  • Patent number: 11283232
    Abstract: A laser protection system includes a high-power laser source, an optical diffuser, a photo detector, a signal-processing device, and a control module. The high-power laser source generates a first laser light beam, and the optical diffuser attenuates a laser power of the first laser light beam to form a second laser light beam. The photo detector obtains an optical detection signal from the second laser light beam. The signal-processing device includes a signal conversion module, a processor, and an encoder. The signal conversion module transforms the optical detection signal into a measurement data eigenvalue. The encoder encodes the measurement data eigenvalue into a measured encoded data, and the setting data eigenvalue into a set encoded data. The control module evaluates the set encoded data and the measured encoded data to determine whether or not the high-power laser source needs to be stopped.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: March 22, 2022
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Chun Chen, Fu-Shun Ho, Chun-Chieh Yang, Yu-Cheng Song
  • Publication number: 20220029008
    Abstract: A device includes a first transistor and a second transistor. The first transistor includes a first gate terminal coupled to the first source terminal, a first source terminal, and a first drain terminal. The second transistor includes a second gate terminal coupled to the first drain terminal, a second source terminal, and a second drain terminal.
    Type: Application
    Filed: July 23, 2020
    Publication date: January 27, 2022
    Inventors: Chun-Chieh YANG, Yue-Ming HSIN, Yi-Nan ZHONG, Yu-Chen LAI
  • Patent number: 11050176
    Abstract: An electrical connector with a contact module includes an insulative body, a plurality of contacts retained to the body, and a grounding bar embedded within the body. The contacts include a plurality of differential pair contacts and a plurality of grounding contacts. The ground bar forms a plurality of spring tangs. The body forms a plurality of cavities and the corresponding spring tangs of the grounding bar extend into the corresponding cavities to contact the corresponding grounding contacts. Conductive adhesive is filled within each cavity and solidified to secure all the spring tang, the corresponding grounding contact and the body together. The electrical connector is formed by a pair of contact modules back to back secured to together by an insulative case either by assembling or via an over-molding process. The cavities and the corresponding conductive adhesive of each contact module is hidden from the exterior.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: June 29, 2021
    Assignees: FUDING PRECISION COMPONENTS (SHENZHEN) CO., LTD., FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Chun-Chieh Yang, Hsiu-Yuan Hsu, Shih-Wei Hsiao
  • Publication number: 20210167571
    Abstract: A power-measuring protection method includes the steps of: applying an optical diffuser to attenuate a first laser light beam to form a second laser light beam; applying a photo detector to detect the second laser light beam to obtain an optical detection signal; applying a signal conversion module to transform the optical detection signal into a measurement data eigenvalue; applying a processor to receive the measurement and setting data eigenvalues, and to further transmit these data eigenvalues to an encoder; applying the encoder to encode the measurement data eigenvalue and the setting data eigenvalue, and then to transmit a corresponding measured encoded data and a corresponding set encoded data, respectively, to a control module; and, applying the control module to evaluate the set and measured encoded data to determine whether or not the high-power laser source needs to be stopped. In addition, a laser processing system is also provided.
    Type: Application
    Filed: December 26, 2019
    Publication date: June 3, 2021
    Inventors: CHIH-CHUN CHEN, FU-SHUN HO, CHUN-CHIEH YANG, YU-CHENG SONG
  • Publication number: 20210098617
    Abstract: A semiconductor device includes an active layer having an active region, a source electrode, a drain electrode, a gate electrode, a source metal layer, a drain metal layer, and a source pad. The source metal layer and the drain metal layer are electrically connected to the source electrode and the drain electrode, respectively. An orthogonal projection of the drain metal layer on the active layer each forms a drain metal layer region. The source pad is electrically connected to the source metal layer. An orthogonal projection of the source pad on the active layer forms a source pad region overlapping the drain metal layer. An area of an overlapping region between the source pad region and the drain metal layer region is smaller than or equal to 40% of an area of the drain metal layer region.
    Type: Application
    Filed: December 14, 2020
    Publication date: April 1, 2021
    Inventors: Li-Fan LIN, Chun-Chieh YANG, Ying-Chen LIU
  • Publication number: 20210083411
    Abstract: An electrical connector assembly includes a seat unit and a cover unit. The seat unit defines a receiving cavity for receiving the CPU. The cover unit is pivotably mounted upon one end of the seat unit. The cover unit includes a first cover and a second cover surrounding the first cover. The first cover includes a first frame equipped with therein a floating heat sink which is located above and aligned with the receiving cavity. The heat sink forms a pair of side extensions sandwiched between a pair of pressing blocks and the first frame in a vertical direction and essentially downwardly pressed by the pair of pressing blocks of the first cover in a resilient manner. Resilient mechanism is provided between the pressing block and the heat sink to result in a downward force constantly urge the heat sink downwardly against the first frame.
    Type: Application
    Filed: September 14, 2020
    Publication date: March 18, 2021
    Inventors: CHUN-CHIEH YANG, WEI-CHIH LIN, HSIU-YUAN HSU
  • Patent number: 10950524
    Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a first source pad, and a first drain pad. The source electrode, the drain electrode, and the gate electrode are disposed on an active region of the active layer. The first insulating layer is disposed on the source electrode, the drain electrode, and the gate electrode. The first source pad and the first drain pad are disposed on the first insulating layer and the active region. The first source pad includes a first source body and a first source branch. The first source branch is electrically connected to the first source body and disposed on the source electrode. The first drain pad includes a first drain body and a first drain branch. The first drain branch is electrically connected to the first drain body and disposed on the drain electrode.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: March 16, 2021
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Fan Lin, Chun-Chieh Yang
  • Patent number: 10910491
    Abstract: A semiconductor device includes an active layer having an active region, a source electrode, a drain electrode, a gate electrode, a source metal layer, a drain metal layer, and a source pad. The source metal layer and the drain metal layer are electrically connected to the source electrode and the drain electrode, respectively. An orthogonal projection of the drain metal layer on the active layer each forms a drain metal layer region. The source pad is electrically connected to the source metal layer. An orthogonal projection of the source pad on the active layer forms a source pad region overlapping the drain metal layer. An area of an overlapping region between the source pad region and the drain metal layer region is smaller than or equal to 40% of an area of the drain metal layer region.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: February 2, 2021
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Fan Lin, Chun-Chieh Yang, Ying-Chen Liu
  • Publication number: 20200212612
    Abstract: An electrical connector with a contact module includes an insulative body, a plurality of contacts retained to the body, and a grounding bar embedded within the body. The contacts include a plurality of differential pair contacts and a plurality of grounding contacts. The ground bar forms a plurality of spring tangs. The body forms a plurality of cavities and the corresponding spring tangs of the grounding bar extend into the corresponding cavities to contact the corresponding grounding contacts. Conductive adhesive is filled within each cavity and solidified to secure all the spring tang, the corresponding grounding contact and the body together. The electrical connector is formed by a pair of contact modules back to back secured to together by an insulative case either by assembling or via an over-molding process. The cavities and the corresponding conductive adhesive of each contact module is hidden from the exterior.
    Type: Application
    Filed: December 30, 2019
    Publication date: July 2, 2020
    Inventors: CHUN-CHIEH YANG, HSIU-YUAN HSU, SHIH-WEI HSIAO
  • Patent number: 10573736
    Abstract: A semiconductor device including an active layer made of III-V group semiconductors, a source electrode and a drain electrode disposed on the active layer, a gate electrode disposed on or above the active layer and between the source electrode and the drain electrode, an interlayer dielectric covering the source electrode, the drain electrode, and the gate electrode and having a plurality of inter-gate via holes. The semiconductor device further includes an inter-source layer, an inter-drain layer, and an inter-gate layer disposed on the interlayer dielectric. The semiconductor device further includes an inter-gate plug filled in the inter-gate via hole and electrically connected to the gate electrode and the inter-gate layer, and a gate field plate being separated from the gate electrode and electrically connected to the gate electrode through the inter-gate layer.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: February 25, 2020
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Fan Lin, Chun-Chieh Yang, Wen-Chia Liao, Ching-Chuan Shiue, Shih-Peng Chen
  • Publication number: 20200020791
    Abstract: A semiconductor device including an active layer made of III-V group semiconductors, a source electrode and a drain electrode disposed on the active layer, a gate electrode disposed on or above the active layer and between the source electrode and the drain electrode, an interlayer dielectric covering the source electrode, the drain electrode, and the gate electrode and having a plurality of inter-gate via holes. The semiconductor device further includes an inter-source layer, an inter-drain layer, and an inter-gate layer disposed on the interlayer dielectric. The semiconductor device further includes an inter-gate plug filled in the inter-gate via hole and electrically connected to the gate electrode and the inter-gate layer, and a gate field plate being separated from the gate electrode and electrically connected to the gate electrode through the inter-gate layer.
    Type: Application
    Filed: September 25, 2019
    Publication date: January 16, 2020
    Inventors: Li-Fan LIN, Chun-Chieh YANG, Wen-Chia LIAO, Ching-Chuan SHIUE, Shih-Peng CHEN