Patents by Inventor Chun Chien Tu

Chun Chien Tu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080148119
    Abstract: A method for Built-In Speed Grading (BISG) comprises a Circuit Under Test (CUT) with Built-In Self-Test (BIST) circuitry, an All-Digital Phase-Locked Loop (ADPLL), and a BISG, to automatically decide the maximum operating frequency of the CUT. The search process for this maximum operating frequency is conducted by a binary search in which the next frequency to test CUT is determined automatically by the BISG controller based on whether the CUT passes or fails the BIST session at current frequency. The maximum operating frequency the CUT can operate is narrowed down to a fine-tuning range out of a number of clock frequencies that the ADPLL can offer. The frequencies an ADPLL can offer is divided into a plurality of coarse ranges, with each of them further having a plurality of fine-tuning frequencies.
    Type: Application
    Filed: December 19, 2006
    Publication date: June 19, 2008
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: Shi Yu Huang, Hsuan Jung Hsu, Chun Chien Tu