Abstract: A processor is configured to store color component values associated with a first subset of vertices of a three-dimensional (3-D) look up table (LUT) in a first subset of memory elements. The color component values are defined according to a destination gamut. A data select module is configured to access the color component values from the first subset of the memory elements concurrently with the processor storing color component values associated with a second subset of the vertices of the 3-D LUT in a second subset of the memory elements. The data select module is configured to access the color component values from the first and second subsets of the memory elements in response to the processor storing the color component values associated with the second subset of the vertices of the 3-D LUT in the second subset of the memory elements. This process can be extended to additional subsets.

Abstract: A processor is configured to store color component values associated with a first subset of vertices of a three-dimensional (3-D) look up table (LUT) in a first subset of memory elements. The color component values are defined according to a destination gamut. A data select module is configured to access the color component values from the first subset of the memory elements concurrently with the processor storing color component values associated with a second subset of the vertices of the 3-D LUT in a second subset of the memory elements. The data select module is configured to access the color component values from the first and second subsets of the memory elements in response to the processor storing the color component values associated with the second subset of the vertices of the 3-D LUT in the second subset of the memory elements. This process can be extended to additional subsets.

Abstract: A video device includes a codec engine to process video data to generate a stream of pixel blocks representing a picture of a sequence of pictures represented by the video data, an image processing module to receive the stream of pixel blocks via a local path between the codec engine and the image processing module and to perform at least one image processing function for the picture using pixel blocks of the stream of pixel blocks received via the local path to generate image processing result data representative of the picture. The video device further includes a storage interface coupleable to a storage component, the storage interface to provide the image processing result data for storage at the storage component.

Abstract: A video processing device includes a video processing unit that decodes a video input signal into a decoded video signal in accordance with a video compression protocol, based on uncompressed video frame data. A tile engine includes a tile accumulation module that accumulates the uncompressed video frame data into a plurality of tile units, wherein each of the plurality of tile units includes a plurality of video span units. A tile compression/decompression module generates compressed video frame data for storage in a compressed video frame buffer by compressing the plurality of video span units into a plurality of compressed video span units and further that retrieves the compressed video frame data from the compressed video frame buffer by retrieving the plurality of compressed video span units and generating the uncompressed video frame data by decompressing the plurality of compressed video span units.

Abstract: A video device includes a codec engine to process video data to generate a stream of pixel blocks representing a picture of a sequence of pictures represented by the video data, an image processing module to receive the stream of pixel blocks via a local path between the codec engine and the image processing module and to perform at least one image processing function for the picture using pixel blocks of the stream of pixel blocks received via the local path to generate image processing result data representative of the picture. The video device further includes a storage interface coupleable to a storage component, the storage interface to provide the image processing result data for storage at the storage component.

Abstract: A display device includes an uncompressed graphical frame buffer that buffers uncompressed graphical frame data. The display device reads the uncompressed graphical frame data from the uncompressed graphical frame buffer for display in conjunction with a first frame of the plurality of video frames. A compression/decompression engine writes the uncompressed graphical frame data to a compressed graphical frame buffer. The video display device reads the compressed graphical frame data from the compressed graphical frame buffer via the compression/decompression engine for display in conjunction with a second frame of the plurality of video frames.

Abstract: A video processing device includes a decoding device that decodes a compressed audio/video (A/V) signal to generate a decoded A/V signal in a reduced blanking format for transmission via a first home digital media interface. A reformatting device receives the decoded A/V signal via the first home digital media interface and scales the decoded A/V signal into a processed A/V signal for transmission via a second home digital media interface. The first home digital media interface and the second home digital media interface have differing data formats.

Abstract: A video processing device includes a video processing unit that decodes a video input signal into a decoded video signal in accordance with a video compression protocol, based on uncompressed video frame data. A tile engine includes a tile accumulation module that accumulates the uncompressed video frame data into a plurality of tile units, wherein each of the plurality of tile units includes a plurality of video span units. A tile compression/decompression module generates compressed video frame data for storage in a compressed video frame buffer by compressing the plurality of video span units into a plurality of compressed video span units and further that retrieves the compressed video frame data from the compressed video frame buffer by retrieving the plurality of compressed video span units and generating the uncompressed video frame data by decompressing the plurality of compressed video span units.

Abstract: An integrated circuit is interfaced with at least one dynamic random access memory (DRAM) via a memory interface. A plurality of user test options are received. The testing of the memory interface is controlled in accordance with the plurality of user test options. Test data, generated as a result of the testing of the memory interface, is stored.

Abstract: An integrated circuit is interfaced with at least one dynamic random access memory (DRAM) via a memory interface. A plurality of user test options are received. The testing of the memory interface is controlled in accordance with the plurality of user test options. Test data, generated as a result of the testing of the memory interface, is stored.

Abstract: A method and apparatus for independent video and graphics scaling in a video graphics system is accomplished by receiving a video data stream, wherein the video data stream includes video data in a first format. A graphics data stream is also received, and the graphics data stream includes graphics data in a second format. The video data of the video data stream is scaled based on a ratio between the first format and a selected video format to produce a scaled video stream. Similarly, the graphics data of the graphics data stream is scaled based on a ratio between the second format and a selected graphics format in order to produce a scaled graphics stream. The scaled video stream and the scaled graphics stream are then merged to produce a video graphics output stream.